1. Sanjay Singh Thakur

    Thread Starter New Member

    Jul 21, 2007
    1
    0
    When output characteristics (Ids versus Vds) plotted for n-channel JFET at Vgs is positive with respect to source, What will be expected at the output current?
     
  2. techroomt

    Senior Member

    May 19, 2004
    198
    1
    good question. i just consulted 4 texts, and not one plotted anything above Vgs = 0v, implying max drain current was achieved. theoretically applying positive bias at the gate would attract addditional current carriers to the region, but also cause an attraction of those same carriers to the gate thereby disturbing current flow through to the drain.
     
  3. chyadesh

    Member

    Apr 10, 2009
    19
    0
    Actually what happens...to my view...when the voltmeter or digital multimeter reads the value of Vgs...those values comes under the negative only...There is no question of taking values of
    Vgs positive... U can clarify this doubt...with some others also..
     
  4. bertus

    Administrator

    Apr 5, 2008
    15,647
    2,346
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