Jfet amplifier

Discussion in 'Homework Help' started by metal_militia7, Oct 16, 2010.

  1. metal_militia7

    Thread Starter New Member

    Jun 13, 2010
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    I have to build an common source amplifier with JFET whose gain is 3
    R load = 4500
    R drain = 4500
    Vdd = 15 V

    RG = 100k

    I have to use 2n5457
    I used shockley's equation to find IDSS and VGS off . I wonder how do i get the load line to get Q point.

    I need to find RS to get ID and plot the load line.
    I am stuck at this point.
    Besides, I do not want to use bypass capacitor at RS, so what is the gain of the circuit formula?
    IS it AV= gm(RD||RL)/(1+ gm(RS))
    Any help would be highly appreciated.
    thanks
     
  2. Jony130

    AAC Fanatic!

    Feb 17, 2009
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    This is a homework or you try to build real jfet amp?
     
  3. metal_militia7

    Thread Starter New Member

    Jun 13, 2010
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    it is sort of lab exercise, i have to figure out everything about this circuit and write my final report.
    The point of my confusion is finding load line, and i measured my IDSS and VGSoff as 3.5mA and -1.85 V respectively.
    I koow i need to figure out RS to get load line, but how ?? still doing my investigation...please just hints would be great.
    thanks
     
  4. Jony130

    AAC Fanatic!

    Feb 17, 2009
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    It's always go to star designs with Vd= 0.5*Vdd = 7.5V
    From then

    Id = 7.5V / Rd = 1.6mA

    gm0 = 2*Idss/|Ugsoff| = 7mA/ 1.85 V = 3.783mS


    So gm at Id = 1.6mA is equal:

    gm = gm0*√(Id/Idss)
    = 3.783mS * 0.676 = 2.55mS

    So know we can find RS.

    Av= Rd||RL / (1/gm + Rs) = 2.25K / (392Ω + Rs) = 3V/V

    Rs = (Rd||RL / Av ) - 1/gm = ( 2.25K / 3 ) - 392Ω = 358Ω = 360Ω

    And know we can find Vgs

    [​IMG]

    `
    Vgs = Vgs_off * [ 1 - \sqrt{\frac{Id}{Idss}} ] = -0.6V

    And If you use self bias method then for Rs = 360 you get Id = 1.63mA

    [​IMG]


    And you have to remember that the amplifier in which Rd=RL is not a good amplifier.
    We should always design the amplifier that Rd<<RL
     
    Last edited: Oct 17, 2010
  5. metal_militia7

    Thread Starter New Member

    Jun 13, 2010
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    Thank you that really helps.
    you said that RD<< RL in JFET amplifier
    so how do i choose RD, should i pick any value and that is less less than RL or there is some rule??
    BUt In BJT's ...for a good design RL= RC is true right?
    I used the same assumption in JFET that is why said i had 4.5k as RD.
    Thank you
     
  6. Jony130

    AAC Fanatic!

    Feb 17, 2009
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    Well, all voltage amplifier should have Rout<<RL (ideal voltage amplifier would have Rout=0).
    Why ??
    This imagine tell all the story
    [​IMG]
    If you chose Rd=RL the voltage gain drops badly, and max output voltage swing also drops.

    So general rule is Rout = 0.1 R _load or better.
    But sometimes respect this rule is impossible.
     
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