I am putting together a datalogger as shown in the attached diagram. There is a battery to backup the real time clock chip so that when the main battery is swapped out for charging the RTC does not reset the time.

The issue I am having is that when the I2C from the RTC is connected to the ATMega but no power is connected, over 1mA is being drawn from the back up battery. If I disconnect the I2C bus the current from the battery drops to below 1uA which is what would be expected.

The question is: is there any way of isolating the I2C bus when the RTC is being driven by the back up battery. I considered transistors driven by the main supply but I assume this would not work because the bus is two way. Any ideas?

 

It sounds like when Vdd for the processor goes to 0, current is flowing into PC4,PC5 via the protection diodes.

Can you set it up so that the Atmega is powered by the backup also when changing the battery? Maybe detect the removal of the battery and sleep the processor/float the other IO?

Alternatively, if you moved the two SCL/SDA resistors to the other side of D2 the sneak path through them would be removed. The RTC would see a 0,0 I2C condition when the battery is removed but you could correct that on power up by sending a stoP condition (and maybe some SCLs until SDA is released) to re-initialize the bus..

I've done isolated I2C for intrinsically safe applications. The main issue, other than cost, is that I2C monitors the bus logic levels for arbitration. If for example, SDA is set to 1 but its read back as 0, it means (to I2C) that another device is on the bus and somebody is going to get arbitrated off. If the delay between 1 and 0 is due to your isolation circuit (slow optos is what I've seen), you get arbitration errors. !Fun.

In any case, if I'm reading this right and your main battery is at J1, you should have a diode across the voltage regulator's input and output. 3 terminal regulators really don't like it when Vin < Vout. 1N400x back-biased across it.

NXP/Phillips has some good info here if you haven't seen it. I think that moving the R's off the current path and making sure the firmware can handle the I2C re-init issues should do it.

Your thoughts?

 

You might want to try connecting R6 and R(GKW) to the other side of D2.

Alternatevly, you could power the pull ups not thru VDD but thru a (free?) pin on the procerssor; do be sure to bypass the pin and add some resistive isolation, say 100 ohms/0.1uF.

 

Thanks guys, I'll try those suggestions.

 

I've had a further play around with this and it is definitely leakage through the ATMega when the Mega has no power. Moving the pull-ups didn't make a great deal of difference. It's almost like the RTC has a detection circuit that senses of the I2C bus is connected and powers it up if it is, I get this impression because when I pull and then remake the connections to the Mega it can take a short while for the current draw from the battery to step up.

I need to look into what happens when the processor sleeps (the aim is to have the processor sleep most of the time anyway) and possibly implement John's suggestion of powering the processor off the backup battery.

It's worth noting that there are other RTCs available which have a separate battery input and internally cut over on power failure – I may look into these. It's also worth noting in the context of this thread (in case anyone stumbles across it in future) that there are specific I2C bus isolator chips – e.g. ADUM1251

 

Ah... I think I see the sneak path: it's the INT output driving PD2. Signal lines can supply power thru the ESD diodes... kinda a common thing though surprising the first time it smacks you in the face.

I think I see where you put a battery into the clock, that is a battery killer. My preferred RTS chip is the PCF2129A, which does just about everything you want including containing the crystal. Handles the battery itself off a dedicated pin.

SOIC SMD package, about 3 bucks in single quantity.

 

Thanks Ernie, the PCF2129A looks interesting, unfortunately it does not seem to be readily available in the UK and postage from the US is just not worth it.

I've looked at others such as the Maxim DS1305 and the ST M41T81 but given where I am at with this I think I'm just going to put a stand-by switch in there that isolates the I2C bus. For a quick battery change a few seconds of 1.3mA from the backup battery is not an issue. For longer disconnections where it is desirable to maintain the clock then I flip the unit to standby. Not the neatest solution but workable for now.

 

Not long after typing the above I was hit by a better solution -isolate the ground at the RTC when the main power goes off. It's easy to implement, I've just tried it with a transistor in the ground path and it works reasonably well, battery current down to 100uA. It would be nice to find something with less leakage...