Ideally, the LT Spice simulation works but when I replace the ideal mosfets with the model I intend to use, it outputs incorrectly. What might be the problem?

 

Do you have a graphical version of your schematic also?

Knowing nothing else, I would say there are two things to check:

• The ideal mosfet may have a very low or nonexistent \(V_{th}\), while the real one needs more voltage to turn on. Maybe you can temporarily tamper with the \(V_{th}\) in your real device model and see if that has any effect.
• The ideal mosfet has zero gate capacitance, so can be driven through (say) a 1k or more resistor, and will turn on instantly. Your real mosfet may be taking too long or not turning on at all. To check if this is the issue, try using your ideal mosfet in simulation, but put 1000 pF or 10000 pF from its gate to source, and see if that messes up the output the same way.

 

The circuit can't provide the upper two mosfets have a enough Vgs to drive them to turn on.

 

You could using two P-type to replacing two upper mosfets and reconnect the inputs voltage to a appropriate Hi/Low level.

 

I had so much issues with the full bridge inverter so decided to use the half bridge inverter. Please see schematic in attachment. I designed my circuit alike though using an CD4007 to generate an inverted signal. My Voltage output was 0.8V compared to ~6V on the simulation. I'd appreciate some clarification here per what i'm missing or doing wrong. I do have present an update on the progress of this project.

 

I designed my circuit alike though using an CD4007 to generate an inverted signal.

You have 2N7002 in your sim, passing ~ 500mA peak current. A CD4007 can only source/sink a few mA.

 

You have 2N7002 in your sim, passing ~ 500mA peak current. A CD4007 can only source/sink a few mA.

To clarify, I think he's trying to say that the low current is not enough to quickly switch your mosfet. The 2N7002 draws essentially zero static current on the gate.

 

I had so much issues with the full bridge inverter so decided to use the half bridge inverter. Please see schematic in attachment. I designed my circuit alike though using an CD4007 to generate an inverted signal. My Voltage output was 0.8V compared to ~6V on the simulation. I'd appreciate some clarification here per what i'm missing or doing wrong. I do have present an update on the progress of this project.

I already said that you need a p type mosfet, the CD4007 can't driving the Vgs of N ch mosfet to make Vds get into the saturated situation.

If you don't need more current and this may works for you.

 

Thanks for your inputs. What would be a suitable replacement for the CMOS inverter in this case?

 

The upper mosfet change to P type is the best way to go, below shows you why.