introduction to JTAG help

Discussion in 'General Electronics Chat' started by MrJojo, Feb 13, 2013.

  1. MrJojo

    Thread Starter Member

    Jan 23, 2013
    45
    0
    Hello all,

    I've been playing around with a Xilinx CPLD and I am getting the wrong output from my CPLD. The CPLD is mounted onto the PCB via solder screened then reflow oven which isn't large enough and gives an uneven distribution of heat to the PCB. I am unsure if all the pins are soldered to the PCB or if there are shorts from the PCB to the CPLD. I believe JTAG can help me narrow down my problem. However, I've never used JTAG before and I am unsure on how to get it "working".

    My understanding of JTAG: I have to program in JTAG code in the XSFV which is uploaded to the CPLD. Next, I send a JTAG signal from a JTAG device which overwrites anything being sent to the CPLD and have the JTAG device analyzes the output. From here, I can determine where my error is coming from.

    Is my understanding of JTAG correct? If not, can someone please explain where I am going wrong. Any information is more than welcome.

    Thanks,
    Matt
     
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