# Instable comparator: How to reduce input imedance of a comparator

Discussion in 'General Electronics Chat' started by gotumal, Jun 9, 2009.

1. ### gotumal Thread Starter Active Member

Mar 24, 2008
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0

In one application note, to avoide the unstable operation of a comparator in the linear region, it has been suggested that to keep the input impedance low to reduce the stray feedback path.

Moreover it is recommended to keep input impedance below 10k. Now, how do I reduce the input impedance of a comparator to sink more current from my earlier stage, i.e. opamp. Should I put a series resistance? What about inverting and non inverting terminal?

Last edited: Jun 9, 2009
2. ### StayatHomeElectronics Well-Known Member

Sep 25, 2008
864
40
Can you post a link to the application note?

3. ### Papabravo Expert

Feb 24, 2006
10,340
1,850
I'm not sure I give much credance to the premise of your question, but the answer is straightforward. You put an impedance in parallel with the input. The impedance of a parallel combination is less than either of the two components. I gather that the actual impedance value is not critical since it will be hard to nail down the imedance of the input.
Code ( (Unknown Language)):
1.
2. 1/Rt = 1/R1 + 1/Ri
3. if Ri >> R1 then 1/Ri ≈ 0 and Rt ≈ R1

4. ### gotumal Thread Starter Active Member

Mar 24, 2008
99
0
Hi,

Page no 4 of the AN below,

http://www.analog.com/static/imported-files/application_notes/46875282066493AN_849.pdf

I also refered some of the books like "The circuit Designer's Companion"
Since I have a hard copy, will type few lines below for your reference,

"Minimise stray feedback

The preferred solution to this problem is to reduce the stray feedback path to a
minimum so that the comparator remains stable even when crossing the linear region.
This is achieved by following three golden rules:

keep the input drive impedance low;

minimise stray feedback capacitance by careful layout;

avoid introducing other spurious feedback paths, again by careful layout and
grounding.

The lower the input impedance, the more feedback capacitance is needed to
genrate enough phase shift for instability. For instance, 2pF and 10k​
Ω gives a pole
frequency of 8MHz, a perfectly respectable oscillation frequency for many high speed
comparators. It is hard to reduce stray capacitance much below 2pF, so the moral is,
keep hte drive impedance below 10kΩ, and preferably an order fo magnitude lower"​

5. ### StayatHomeElectronics Well-Known Member

Sep 25, 2008
864
40
It sounds to me like they are recommending that the output drive into the opamp used as a comparator be of low impedance, not necessarily loading down the output driver so the input impedance of the opamp used as a comparator is low. But, maybe I am misreading it.