Implementing "How Stuff Works" Digital TTL Clock

Discussion in 'The Projects Forum' started by Abram, Jun 23, 2008.

  1. Abram

    Thread Starter New Member

    Jun 23, 2008
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    0
    Hi, I am trying to implement a slightly modified version of this http://electronics.howstuffworks.com/digital-clock3.htm Digital Clock, and my doubts are the following:

    1)If I already have a 1hz signal available, can I throw out the two first 7490? (more details in the two first lines of the first paragrapher of http://electronics.howstuffworks.com/digital-clock6.htm
    2)I am not sure of how to implement this:
    Could someone explain to me exactly How I could use an AND gate to do this? Or how I could use the R inputs to detect the binary 24 and then what connections I would need to do to reset the hours counter?

    Thanks for the help
     
  2. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    For the 24 solution - use the 2 as one input and the 4 as the other. The output of the gate then resets the counters back to zero. The AND gate would be a 7408. Tie unused inputs to ground.

    Can you get all the chips? 7490's and 7447's have been quite hard to find. I like to use 4000 series CMOS, as the stuff is more available and runs on +3 to +18 volts.
     
  3. Abram

    Thread Starter New Member

    Jun 23, 2008
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    0
    I really don't get it. The pin 4 does not do anything. How I can connect the output of the 7490 that take care of the minutes to it then?
    The same minute output pin (the number 8 or 'QC') should then be connected to the pin number 2? Is really this? If that is the case I really have no idea of how this works. Could you try (again) to make it more clear? Thanks in advance.

    The guy that supervisiones the laboratory of digital systems down will supply all the needed components necessary to the project, I guess the components are being borrowed since many years ago.
     
  4. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    Here is a link to a site that has a bit of information on 74xx logic - http://www.kpsec.freeuk.com/components/74series.htm.

    If you have two 7490's set up as a cascading counter, then when the 10's digit counter holds a count of 2, the QB output will be high. If the lower (units) counter holds the value of 4, then the QC output will be hight. If these outputs go to the inputs of an AND gate, the output of that AND gate will go high. Take the output to the reset inputs of the 7490's. The counter will go from 0 - 23, and reset back to 0 at 24.
     
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