Hey everybody. Our project for this semester is to design a digital circuit functioning as a vending machine. I designed the circuit and I want to do the simulation. I am using multisim 7 but it is not effective. I mean the page which I am working on inside the software cannot carry the hole circuit since it is very large. I need a better software.

Thanks

 

Since it is a large digital circuit you are designing and simulating, I would suggest using software that is intended for a CPLD/FPGA which will support development, simulation and target download. I personally have been using Xilinx's ISE Webpack, which is free to download (its a big download and you have to sign up and register it). This software will let you create a design in either a 'schematic' form, 'hardware description language', or 'state logic'...which ever is easiest for you. I will admit it is a bit intimidating to get started with, but after going thru the guided tutorials a couple of times you will get the hang of it quickly.

The software simulates the circuitry in a timing diagram fashion, so you can create very accurate models, and know how the circuit will behave before downloading it into the target device.

The reason I suggest that type of software is because a complex digital logic circuit will require lots of PCB space and lots of individual IC's, whereas a CPLD will be only one IC that can be reconfigured multiple times. TTL is fun if you only need a few IC's, but as soon as the complexity of the circuit increases you should consider a CPLD, this way is a mistake is made in the design it is easy to reconfigure. It only takes one missed wire or trace to mess up an entire TTL circuit, and with a CPLD you get to assign which pin goes where.

Anyways, have fun!