# I need help about Binary and BCD counter

Discussion in 'Electronics Resources' started by Mussawar, Apr 1, 2013.

1. ### Mussawar Thread Starter Member

Oct 17, 2011
68
3
Hi,
I'm using an 8 bit binary up/down counter based on CD40193. I cascaded two 40193 to get 8 bit code. It is working fine. (Please see attached diagram) Now I want to display these 8 bit binary code values on 7 segment display. In short, I want a binary U/D counter but wish to display this counting on 7 segment display in a decimal order. (i-e 1,2,3,....15,16,17,.....98,99,100,101......). One count 'UP' should step UP the binary counting as well as 7 segment display. How can I do this?
I now that I can use CD40110 to make just a simple 7 segment display U/D counter without getting in the binary code, but it is really important to me to use binary code. I can't bypass the 8 bit code because it is being used somewhere else. I hope you find what I want to say. Please give me an idea or guideline.

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2. ### crutschow Expert

Mar 14, 2008
13,481
3,368
Here's a discussion on converting binary to BCD. Note my post.

Edit: It's likely that the simplest design is to use the BCD 40110 counters in parallel with the binary counter which requires just one extra chip per digit. Just have the two counters count the same signal. That way you will have the binary count along with the BCD 7-segment output.

Last edited: Apr 2, 2013
3. ### Mussawar Thread Starter Member

Oct 17, 2011
68
3
.

Thanks. Actually I, too, think the right about it and now I'm using this. No doubt it would be a poor design because if, by any means, both the counters are misaligned, the display would be showing worse then the actual binary value and I need too many chips ( Because I have to make 4 sets) but it becomes very simple now. I think it should work for me with a rare chance of misaligned. Again thanks for your response.

4. ### crutschow Expert

Mar 14, 2008
13,481
3,368
As long as the signals to both counters meet the timing and voltage requirements for each counter then I see little chance of error.

I see that you are showing a switch for the up/down signals. If those are mechanical switches then you must add a debounce circuit on each switch. Otherwise you could get false counts and misalignment between the counts.

Oct 17, 2011
68
3

6. ### crutschow Expert

Mar 14, 2008
13,481
3,368
Can you get a 40193?

Otherwise you could use a quad 2-input NOR gate to generate the up/down signal (from a cross-coupled latch) and the clock pulses (by ORing) from the Up clock and the Down clock signals (see below).

Since the 4516 requires that the clock rise occurs after the up/dn signal has settled, the clock is delayed ≈70ms by the RC circuit. This should also provide the debouncing function for the switches, so you don't need an added circuit for that.

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7. ### absf Senior Member

Dec 29, 2010
1,493
374
I redrew crutschow's circuit diagram so I could see its working better.

Allen

• ###### mussawar UD counter.PNG
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Last edited: Apr 5, 2013
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8. ### Mussawar Thread Starter Member

Oct 17, 2011
68
3
@ “crutschow” and “absf” :
Bravo bravo. Thanks a lot. It is actually what I need to do the job. Also thanks to “absf” to make it more readable. I’ll try it out and seems it would work fine. Regards.

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