How well is this board layed out?

Discussion in 'The Projects Forum' started by anthony_b_mcdonald, Apr 24, 2012.

  1. anthony_b_mcdonald

    Thread Starter New Member

    Apr 24, 2012
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    0
    Hi All,

    I'm new to this forum. I'm making a pcb with flash memory IC that plugs into a Microchip PIC32 eval board. This will add an ONFI flash interface to the uC's peripheral bus. I'm not a hardware guy and my 1st flash board performed poorly. The problem I saw was that the supply voltage at the flash IC on this board was very noisy: +/- 0.5V on a 3.3V supply. On an oscilloscope I could see that the bus signals were flakey when the supply voltage fell out of spec. This time I'm trying to follow better layout practices. I'd like feedback about the new layout before I send it to the boardhouse.

    Do you see anything that I should add or change to make a better operating board? Is this similar to the way your board might look if you made this? Also anyone interested in the design for themselves can just pm me for the project files.

    Here are some things I'm doing *differently* this time because of guidelines I found on the web:
    - "Use a ground plane and a VCC plane. Avoid long slots in ground planes."
    - "Make ground vias large in diameter."
    - "Run ground traces along-side VCC traces. Separate sensitive signal traces with ground traces."
    - "Avoid running signal traces in parallel."
    - "Make all bus signals equal length."
    - "Keep traces for bypass caps as short as possible and as close to the IC's VCC pin as possible to reduce inductance. Place caps between the trace to the plane and IC pin instead of behind it."
    - "Reduce inductance by dividing the value of one bypass cap into several smaller value caps connected in parallel."
    - "Use reverse geometry bypass caps to reduce inductance, i.e. the cap should be wider than its length."
    - "Use terminating resistors on buses to reduce signal reflection."
    - "Keep the distance between signal lines more than twice the width of the signal line."
    - "Avoid long traces for lines to an analyzer tool, and connect analyzer lines to each signal line using a resistor."
    - "Use decoupling filters on power supplies going to circuit subsystems."

    The eval board has a 132 pin connector that normally plugs into a breakout board. This connector carries the signals for most all uC pins. My flash board will stack between the eval board and breakout board, and still carry the signals between the eval and breakout boards.

    Fundamentally the board is simple: it has a flash IC and a header to connect analyzer probes to monitor signals. There are "terminating" resistors in series between the connector and flash pins, and "damping" resistors going to the analyzer header. I'm using resistor values I found from other designs.

    I'm using the free version of Eagle, so I can only make 2 layer boards. The board is about 2 x 3 inches. I added pics of the schematic and board layers.

    To describe my pics of the layout:
    - I placed the ground plane, flash chip, and 4 resistor array ICs on the bottom side (bottom side has blue traces).
    - I made a small power plane on the top side for the bypass caps. The bypass caps, some 0 ohm jumpers, individual resistors, and the header for the analyzer probe are all on the top side (top side has red traces).
    - I tried placing all traces on the top side to reduce slots and holes in the bottom side ground plane.
    - I filled the unused areas of the top side with a ground plane so that ground traces run between signal traces.
    - It's not shown in these pics, but I'm currently rerouting traces from the connector so that all bus signals are of equal length. (Hopefully the traces on the eval board are equal length too!)
    - I'd like to add a decoupling filtering between the power supply pin on the connector and the power plane but I don't know what to use.
     
  2. MrChips

    Moderator

    Oct 2, 2009
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    3,363
    I would make the VCC traces a lot wider (maybe three times wider).
    Put a 10 to 25μF tantalum where the VCC and GND enters the board.
    I would also put a 3 to 10μF SMD tantalum in parallel with the 0.1μF bypass caps.
     
    Last edited: Apr 25, 2012
  3. anthony_b_mcdonald

    Thread Starter New Member

    Apr 24, 2012
    3
    0
    MrChips, If I make the VCC traces wider, they'll be wider than the footprint for the pin at the connector. Will a bottleneck defeat the purpose of a wide trace? There *are* other VCC pins on the connector. Is it ok to connect 3 of them someplace near the connector to make a wider trace?
     
  4. MrChips

    Moderator

    Oct 2, 2009
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    3,363
    If you have to use a bottleneck to get to the VCC pin that is the best you can do.
    This is still better than one long thin trace. Remember, your objective is to reduce the overall net resistance and inductance.
     
  5. anthony_b_mcdonald

    Thread Starter New Member

    Apr 24, 2012
    3
    0
    Thanks, MrChips--I will widen them.
    - Do you recommend that the circuit connect to more than one VCC pin? This connector carries VCC across several pins but I reference just one.
    - The same question goes for the ground: should the circuit connect to several GND pins, or will this risk causing ground loops?
     
  6. MrChips

    Moderator

    Oct 2, 2009
    12,447
    3,363
    Yes, I would use all the VCC and GND connections on all connectors and ICs.
    Pins and contacts all have finite resistance and can handle only so much current.
    It is best to reduce total contact resistance as much as possible. No, you will not be creating ground loops.
     
    anthony_b_mcdonald likes this.
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