Hi everyone,
I m working on an inverter using H bridge for that i have designed the
driver circuitry using EEPROM & 8 bit counter.
the 8 bit counter inputs the counting sequence to EEPROM (AT28C64B)
which has address bits from A0-A12 , the address bits from A0-A7
are addressed by the counter (Y decoder) as far as A8-A12 address bits are concerned ( X decoder) i have to select 32 columns from 00 (00000) to 1F (11111) i want to select this setting with dip switch, here i m slight confused how i will connect the dip switch with A8-A12 so that i creates logic 1 or 0.
Attached is the rough schematic for the driver circuitry kindly see it
& post a solution,

Thanks.

 

Individually pull up each of the A8-A12 inputs to the +5V rail via (say) 1k resistors and connect the DIP switches to the same inputs on one side of each switch separately and the other side of all the switches commoned to ground [0V]. If a particular switch is open then the logic is '1' at the corresponding terminal, since the input terminal is pulled up to 5V (logic high). If the switch is closed then that terminal is then at logic '0' - because that terminal is now pulled to ground through the closed switch.

The corresponding 1k resistor from a terminal to +5V rail takes a small current ~5mA from the supply in the switch closed condition. If all switches are closed that's an extra 25mA your supply needs to have in reserve. If that's too much then make the R values bigger.

Careful you don't mistakenly connect a switch from +5V to ground - you'll short out the supply when you close the switch. Check it all before turning on.

 

I have done in the same way by connecting the with five 4.7K resistor & programmed the EEPROM with logic 00000 means all the states are low (0) from A8-A12 x decoder but at the data outputs i have checked with leds D0-D7 it contineously glowing not showing on off but when i checked it with oscilloscope it shows square wave is it correct or there might be a problem in hardware or the switching time is so fast that it cant be measured on LED's.

But when i did not connect the dip switch only A0-A7 are input by the counter the rest A8-A12 are left ideal
& programmed the EEPROM as same in 00 (X) state then at D0-D7 shows on off state on LEDs as well as when i connect the data outputs with analog volt metre it shows deflection.

Kindly reply,
Thanks

 

What is the clock frequency? As you suggest, if it's high enough you won't detect the LED states changing with the naked eye - other than their light output being fainter than when they are solid on.

 

the clock frequency is 12.8KHz..

But when i did not connect the dip switch only A0-A7 are input by the counter the rest A8-A12 are left ideal
& programmed the EEPROM as same in 00 (X) state then at D0-D7 shows on off state on LEDs as well as when i connect the data outputs with analog volt metre it shows deflection.

 

Let me get this straight.

With the A8-A12 lines all low the LED's on the output data lines glow but don't visibly flash on-off. However monitoring of the data lines using an oscilloscope indicates the data lines are switching.

With the A8-A12 lines all high the LED's on output data lines visibly flash on and off. You also confirmed data output line changes with an analog meter.

Given the clock rate is constant then why this significant difference?

What is unknown to me is the way in which the embedded PWM code pattern changes as you cycle through the 4096 (?) address states. There may be a significant pattern difference with A8-A12 lines all low compared with A8-A12 lines all high....?

What happens if you change just one of the A8-A12 bits? Say A8.

Did you check with the oscilloscope with the all high A8-A12 case?

You could also try either - running a much lower clock rate to observe the output switching on the LED's - or halting execution of the 8-bit low end addressing and noting that the output lines (PWM code) are consistent with the current address values for the EEPROM. You could check several column addresses to confirm all is consistent. To halt the A0-A7 address cycling you would inhibit but not reset the 8-bit counter.

Also it shouldn't be a problem but check the 4.7k values do give > true logic high value when the switches are off - per the EEPROM data sheet.