Everything looks ok; I didn't check all the numerical results. You've made some approximations, such as in the calculation for VB where you didn't take into account the effect of the base current on the voltage divider, etc., but approximations are only approximate, right?
The one thing I see that doesn't look quite right is at the very end where you calculate Ic(max).
If you want Ic(max) when the transistor is held full on with DC drive, then Ic(max) would be something like Vcc/(100+8.2+36).
If you want Ic(max) given the 500 mV P-P input signal, that's a different calculation!
But, the problem didn't ask for Ic(max), so you're ok.
Notice the DC load line is asked for so I simplified the schematic accordingly. Follow the equations step by step and you'll see the reasoning. This is approximate. Your teacher probably wants you to use beta and/or alpha and a more exact solution for Ie. Remember the loop equation for that? More on this point if you want.
My evaluation was a little crude, given the relatively high amount of current going into the base. You need to thevinize the input as an equivalent resistance and voltage, then write a loop that includes that, Vbe and Ie, solving it for Ie. This will give you a more exact Ve and Vc. Then use these to determine Vce = Vc - Ve. Get Ic from Beta and Ic(sat)is solved as above. Ic(sat), by the way is the total amount of current available from the source given Vcc and the resistances of the circuit. Draw the load line the same as I drew it. This should put your teacher in tall cotton when he evaluates your homework!