How to filter out a power-on spike?

Discussion in 'The Projects Forum' started by Involute, Sep 6, 2016.

  1. Involute

    Thread Starter Active Member

    Mar 23, 2008
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    I have an ATTiny85 design that I power from a 24VDC wall wart. My circuit has an LDO generating 5VDC from the 24VDC (there are no other active components on the 5V rail so there's not a lot of power dissipated in the LDO). The Tiny controls a MOSFET which controls a 24VDC solenoid. When I plug the cable from the wall wart into my board I get a spike on the 5V rail that sometimes exceeds 8V (though just for a few microseconds). Enough of this finds its way to the IO pins to trigger the gate on the MOSFET, triggering the solenoid when I don't want it to be triggered. I've tried a range of caps on the 5V rail and the specific IO line in question, from .01 uf up to .1 uf, but without consistently reliable results. Any suggestions for how to filter out this spike? Thanks.
     
  2. ronv

    AAC Fanatic!

    Nov 12, 2008
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    It's probably the very fast rise time when you plug it in hot.
    Since the current is low add a 10 ohm resistor in the input side followed by a 10ufd. cap to ground.
     
  3. Involute

    Thread Starter Active Member

    Mar 23, 2008
    47
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    Thanks for the tip. I tried this but no effect. Is this what you meant?
    FIlter.jpg
     
  4. ronv

    AAC Fanatic!

    Nov 12, 2008
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    Yes, that's it. I would have bet on that one. :(
    Sometimes the micro wakes up with the output high. I think there is a way around this but I can't remember what. Maybe a micro guy will know.
    I'm assuming the micro output drives the FET.
    Does it do the same thing when you leave the output of the supply plugged into the micro and turn the power on at the wall?
     
  5. Involute

    Thread Starter Active Member

    Mar 23, 2008
    47
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    No, the problem only occurs when I plug the wart into the circuit. I'm playing around now with a 5.1V zener on the 5V rail.
     
  6. Sensacell

    Well-Known Member

    Jun 19, 2012
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    Do you have a pull-down resistor on the I/O pin output?

    When the MCU resets, the pins normally default to Hi-Z input state, then your application code defines them as outputs and they become stable.

    A pull down resistor ensures the FET doesn't get turned on during this undefined period.
     
    ronv likes this.
  7. Involute

    Thread Starter Active Member

    Mar 23, 2008
    47
    1
    Bingo! A 1K pulldown seems to solve the problem. I'm still seeing some major spikes on that gate (> 16V), but I can't get it to trigger spuriously. I'll play around with it some more, but hopefully that solves the problem. Thanks!
     
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