how to eliminate phase difference between two signals???

Thread Starter

Jas9

Joined Sep 30, 2010
36
hello friends,
I have a voltage and current input signal in simulink which has a small phase shift between the two signals. Is their a way so that i can eliminate this phase difference to zero?
thanks
 

rrrchandu

Joined Aug 9, 2010
28
You haven't specified that whether it is current leading or voltage leading?
As we know, capacitor shows phase shift such that current leads voltage, and if it is in the case of inductor, the phase shift is in the form of voltage leading. So, you can conclude that, by using capacitor or inductor, according to your requirement.

But, there will be change in frequency. So, check it out first, then use it.
 

gootee

Joined Apr 24, 2007
447
You haven't specified that whether it is current leading or voltage leading?
As we know, capacitor shows phase shift such that current leads voltage, and if it is in the case of inductor, the phase shift is in the form of voltage leading. So, you can conclude that, by using capacitor or inductor, according to your requirement.

But, there will be change in frequency. So, check it out first, then use it.
How would there be a change in frequency?
 

Kermit2

Joined Feb 5, 2010
4,162
The amount of leading or lagging will vary as freq changes.

The passive component have no effect on the freq itself, but have a specific reaction at a specific freq. and that is what changes IF the freq is different
 

gootee

Joined Apr 24, 2007
447
The amount of leading or lagging will vary as freq changes.

The passive component have no effect on the freq itself, but have a specific reaction at a specific freq. and that is what changes IF the freq is different
OK. That makes more sense now.

To offer more-specific help, we would need to see the cicuit, and get a plot of the phases of V and I versus frequency.
 
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