How to divide the clock frequency by 16?

Discussion in 'General Electronics Chat' started by gima, May 21, 2013.

  1. gima

    Thread Starter New Member

    May 18, 2013
    2
    0
    i want to design a circuit for dividing my clock frequency by 16 but i miss some of the ideas on how to implement it. please let you help me!!
     
  2. LDC3

    Active Member

    Apr 27, 2013
    920
    160
    An easy way is to feed the clock through 4 D-type flip flops in sequence. The clock is attached to the clock on all FFs. The output of the 1st FF is fed back through an inverter to the data-in of 1st FF, and to the data-in on the 2nd FF. The output of the 2nd FF is connected to the data-in of the 3rd FF, and the 3rd FF output is connected to the data-in of the 4th FF. The output of the 4th FF will be the clock / 16.
     
    gima likes this.
  3. WBahn

    Moderator

    Mar 31, 2012
    17,748
    4,796
    Or, if you want something that actually works, you could take the four D flip flops and configre each as a T-FF (toggle flip flop) by connecting the inverted output back to the data input. You then apply your clock to the clock of the first stage. You apply the output of each stage to the clock input of the next stage.

    This is an asynchronous design and will work as long as this is the only thing your original clock is used for (or, more to the point, if the circuitry driven by the output clock of this circuit never interacts with circuitry that is driven by the original clock).

    The circuit that LDC3 describes will only divide the clock by two. The last three stages are merely acting as a shift register.
     
    gima likes this.
  4. crutschow

    Expert

    Mar 14, 2008
    13,014
    3,234
    You can also use a single 4-bit counter such as a CD4029.
     
  5. Dodgydave

    Distinguished Member

    Jun 22, 2012
    4,986
    745
    Use a CD4040 ripple counter.

    clock in on pin 10, output on pin 5.
     
    gima likes this.
  6. LDC3

    Active Member

    Apr 27, 2013
    920
    160
    You're right. I wonder why I didn't see that. :confused:
     
    gima likes this.
  7. WBahn

    Moderator

    Mar 31, 2012
    17,748
    4,796
    Don't worry. I spotted it right away, but had to check it twice and ask three ways if my conclusion made sense before I was confident enough to point it out.
     
    gima likes this.
  8. Bernard

    AAC Fanatic!

    Aug 7, 2008
    4,172
    397
    Selection of a counter might depend on clock frequency.
     
    gima likes this.
  9. GopherT

    AAC Fanatic!

    Nov 23, 2012
    6,058
    3,820
    Excellent option, each output pin on the CD4040 provides a different divide by 2^{n} down to n=14. A single chip solution.
     
    gima likes this.
Loading...