Hey guys....so for a class project, I need to wire together a mod 4 counter for a 7493 and a 7476 (JK FF) , a Mod 9 for the same but for (2) 7476's due to the 4 stages for the bits and finally a Mod 13 counter for each.....and once again using (2) 7476's.....I have the Mod 13 down with the J K FF's with Q1 Q3 and Q4 outputs entering a 7410 (3 Input Nand gate) BTW.... Q1 represents 1 in Binary, Q3 represents 4 in binary and Q4 represents 8 in binary for a total of 13....now I know that my CLR stages act off of active Lows which in turn means once 1 4 and 8 are all high at the same time...the Nand gate will produce my Low clearing / reseting the count after 12 back to 0 which is my Mod 13 for my 7476's......I'm somewhat stuck on configuring the Mod 13 for a 7493 though....the chip itself has an interior 2 input Nand gate, but I need a 3 input Nand gate in order to clear after the 12 count...but if I use a 7410...could I just send the active Low into CLK B input which is pin 1 which BTW the resets (interior nand gate) are pin 2 and 3....how can I make this work?

 

That is a very intense and almost impossible to read through post.

You say you can see how the interior AND gate works - to implement a short count on 13, simply implement an exterior AND gate to use those bits set high on 13 and the clock to reset back to 0.