# How Do I Calculate this Resistor?

Discussion in 'General Electronics Chat' started by CoderJohn, Jun 3, 2015.

1. ### CoderJohn Thread Starter New Member

May 22, 2014
14
0
For this test circuit I am using a SN74161N 4-bit counter.
I am trying to learn digital electronics and have recently bought the Basic Stamp PLC by Parallax.
I have gotten the circuit to work using the Basic Stamp. Now I am trying to build it on a breadboard without the PLC. My question is regarding pull-up and pull-down resistors.

Correct me if I am wrong, but I believe the pins are as follows.
V_IH = 2 volts minimum
V_IL = .8 volts max

The question is not so much what resistor to use, as much as it is how do I go about calculating these resistors.
I am wanting to use a pull-up resistor connected to the CLR pin( which is an active-low ). My power supply is 5V.

I am not sure if this is right, but the max current for the pin is 40uA(again, correct me if I am wrong).

My guess for the maximum possible resistor is:

(5V - 2V)
----------
(40uA/1,000,000uA) -> convert to amperes

= 75,000 ohms

Is this how I would calculate the maximum resistor? How would I calculate the minimum resistor?
Also could someone explain this for pull-down resistors as well?
Any help is much appreciated! Thank you.

2. ### crutschow Expert

Mar 14, 2008
13,529
3,393
Those voltages are the specified minimum and maximum for a logic 1 and logic 0, they are not voltages you design to.
Normally you just tie the input to +5V for logic 1 and ground for logic 0.

3. ### CoderJohn Thread Starter New Member

May 22, 2014
14
0
Yes I realize that, but sometimes the IC had current leakage and a pull up/down resistor is required.

4. ### ErnieM AAC Fanatic!

Apr 24, 2011
7,447
1,628
Your formula is correct but the reasoning is a bit off. You don't want to drive the input to the limit, you want it way away from the limit.

So for a pull up resistor you would want to use a maximum of 75K for a pull up resistor, preferably much less to make the worst case input voltage greater than 2V. Both 1K and 10K are typical values for TTL logic. If you were using CMOS then much higher values are also common as the leakage there tends to be near zero.

5. ### CoderJohn Thread Starter New Member

May 22, 2014
14
0
Thanks, how would I calculate the minimum and also, how would this be calculated in the case i choose to use a pull-down resistor?

6. ### ErnieM AAC Fanatic!

Apr 24, 2011
7,447
1,628
The minumum depends on what else is there. If you are just pulling the pin up by itself then zero is acceptable, just tie it high.

However, sometimes a pull up is used to tie several "open collector" outputs together. Then the minimum depends on how much current the weakest part can sink (as it needs to short the resistor to ground), and also how fast you want it to run (as the resistor is the only thing driving the line high).

If you are just making a single pin high then just connect to the Vcc.

7. ### dl324 Distinguished Member

Mar 30, 2015
3,397
653
Why do you think you need a pull up/down resistor? Explain your situation and you'll get a better answer.

If the inputs in question are being "driven", you don't need a pull up/down unless you're mixing logic technologies (e.g. CMOS and TTL) or you're level shifting. They could also be required if you have tri-state logic, switches, and/or jumpers.

Another thing to note is that you're attempting to drive standard 74 TTL from CMOS; make sure the Stamp's outputs can provide enough drive.

8. ### CoderJohn Thread Starter New Member

May 22, 2014
14
0
Well although the experiment is for this chip, the question is for specific and future references... Anyone know of a good book on this matter? I will be taking circuits I next semester, but by hobby I am a programmer. I am trying to get into cpu chips and anything of the sort. One project I want to attempt is a Zilog Z80 computer. I am familiar with the assembly language of the cpu chip itself. I am good with analog circuits, but digital circuits are a mystery.

Mar 30, 2015
3,397
653