high-pass filter not doing what it's supposed to

Thread Starter

TheComet

Joined Mar 11, 2013
88
Here's a very strange problem I've come across. I need to shift a high-frequency (50 kHz - 10 MHz) 5V amplitude square wave signal down to -100V, in order to drive the gave of a MOSFET. I did this with a high-pass filter:



This works fine at high frequencies, but for some reason not with low frequencies. In this case, 200 kHz.

I measured the voltage at IN+, and as you might expect, it is a clean 200 kHz square wave.



HOWEVER, when I measure the voltage at V3.pin1 (between C5 and R8), I get this horrible thing (200 kHz):



This doesn't make any sense to me. It's a high pass filter with a cut-off frequency of 1.5 kHz, why is it doing that?

Does it have something to do with the gate-capacity? Or Miller capacity?

Here's the entire circuit:
http://imgwiz.com/images/2013/05/06/BJgDu.png

The signals IN+ and IN- are as follows (5V digital):


Thanks for any help you can give me. If you need more information, I'll be happy to supply it.
 

Ron H

Joined Apr 14, 2005
7,063
I can't explain it either.
If you are expecting to get ±100v out, prepare to be disappointed. Since V2 is operating as a source follower, the high output level at TP1 will only be a volt or two.
 

Thread Starter

TheComet

Joined Mar 11, 2013
88
Why are you running the MOSFET source to -100V?
So D3 isn't supplied a negative voltage when the output is -100V.

If you are expecting to get ±100v out, prepare to be disappointed. Since V2 is operating as a source follower, the high output level at TP1 will only be a volt or two.
The circuit works, and is outputting ±100V at 10 MHz with a rise/fall time of <5ns. The reason it works is because V2 is bootstrapped.

@ all

From my observations, I'm assuming the culprit is the Miller capacity of V3. When the Gate is switched on, the voltage on the drain terminal is ripped from +100V down to -100V. I'm assuming this has a capacitive influence on the Gate voltage, ripping it down with it.

TheComet
 

Ron H

Joined Apr 14, 2005
7,063
So D3 isn't supplied a negative voltage when the output is -100V.



The circuit works, and is outputting ±100V at 10 MHz with a rise/fall time of <5ns. The reason it works is because V2 is bootstrapped.
I missed the bootstrapping.:(
 
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