I have a 18F27J53.

http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en548695

I am trying to get the configuration bits set to enable the RTCC but they won't stay set.

The enable bit RTCEN of the RTCCFG register must be set to enable the clock. But to that the datasheet says:

An attempt to write to the RTCEN bit while RTCWREN = 0 will be ignored. RTCWREN must be set before a write to RTCEN can take place.


Well I set RTCWREN but I don't even see it actually being set in the debugger. RTCWREN is also in RTCCFG.

The datasheet says

The RTCCFG register is only affected by a POR.

Now I know POR is power on reset but what does this mean. "only affected by POR"? Do I need to handle that in my code some special way?


The datasheet says:

For the RTCWREN bit to be set, there is only one instruction cycle time window allowed between the 55h/AA sequence and the setting of
RTCWREN.


What does this mean exactly?


They give this example in assembler for setting RTCWREN

movlb 0x0F ;RTCCFG is banked
bcf INTCON, GIE ;Disable interrupts
movlw 0x55
movwf EECON2
movlw 0xAA
movwf EECON2
bsf RTCCFG,RTCWREN

How would I handle this in C? Aren't they just selecting the bank where the configuration register is and doesn't C do that for me alreadY

 

I took a stab at converting this for C18 but no luck.

From

movlb 0x0F ;RTCCFG is banked
bcf INTCON, GIE ;Disable interrupts
movlw 0x55
movwf EECON2
movlw 0xAA
movwf EECON2
bsf RTCCFG,RTCWREN

to

void unlockRTCC()
{
_asm
movlb 0x0F 
bcf 0xFF2,7  //INTCON, GIE
movlw 0x55   
movwf 0XFA7 // EECON2
movlw 0xAA
movwf 0xFA7 // EECON2
bsf 0xF3F,5 // RTCCFG, RTCWREN
_endasm
}

Can anyone help?

I guess there is something to be said for learning assembler

 

Got it working! Got the clock working too!

void unlockRTCC()
{
_asm
movlb 0x0F 
bcf 0xFF2,7,1  //INTCON, GIE
movlw 0x55   
movwf 0XFA7,1 // EECON2
movlw 0xAA
movwf 0xFA7,1 // EECON2
bsf 0xF3F,5,1 // RTCCFG, RTCWREN
_endasm
}