What do you mean the clokc is going down?

Let's look at this one clock cycle at a time. Before the first clock, what are the inputs at all the FFs across the circuit? They are

Clk|Data||J3|K3|x3||J2|K2|x2||J1|K1|x1||J0|K0|x0|
1|0||0|1|0||0|1|0||0|1|0||0|1|0|
2|1|||||||||||||||||
3|1|||||||||||||||||

Knowing what the J and K inputs are to each FF before the clock lets you determine what the outputs are after the clock.

Clk|Data||J3|K3|x3||J2|K2|x2||J1|K1|x1||J0|K0|x0|
1|0||0|1|0||0|1|0||0|1|0||0|1|0|
2|1||||0||||0||||0||||0|
3|1|||||||||||||||||

Now complete the second row for the rest of the signals.

Clk|Data||J3|K3|x3||J2|K2|x2||J1|K1|x1||J0|K0|x0|
1|0||0|1|0||0|1|0||0|1|0||0|1|0|
2|1||1|0|0||0|1|0||0|1|0||0|1|0|
3|1|||||||||||||||||

Now let the clock happen and update the outputs of the FFs.

Clk|Data||J3|K3|x3||J2|K2|x2||J1|K1|x1||J0|K0|x0|
1|0||0|1|0||0|1|0||0|1|0||0|1|0|
2|1||1|0|0||0|1|0||0|1|0||0|1|0|
3|1||||1||||0||||0||||0|

isnt 10 is 1 in jk flip flop thn why you have 0 for x3 on the 2nd column?

 

Clk|Data||J3|K3|x3||J2|K2|x2||J1|K1|x1||J0|K0|x0|
1|0||||0||||0||||0||||0|
2|1||||1||||1||||0|| 0
3|1||||1||||1||||0|| 0
4|0||||0||||0||||1|| 0
5|0||||0||||0||||1||| 1
6|1||||1||||1||||0|| 1
7|0||||0||||1||||0|| 0
8|1||||1||||0||||1|| 0
9|0||||0||||1||||0|| 1
10|1|||1||||0||||1||| 0

 

isnt 10 is 1 in jk flip flop thn why you have 0 for x3 on the 2nd column?

Because the inputs do not appear on the outputs until AFTER the clock pulse.

You define what you mean by each column as you see fit (within constraints) but in sequential circuit you generally talk about the signals as they appear prior to the clock and, commonly, you might have additional columns for what they will be after the clock. Bit it is also common to see them listed on the next row.