help with asynchronous counter

Discussion in 'Homework Help' started by Totally Jesus, May 28, 2009.

  1. Totally Jesus

    Thread Starter New Member

    May 28, 2009
    3
    0
    For part of an exam tomorrow i need to build a 3 bit asynchronous counter that counts from 1 to 6 and uses d flip flops with positive edge trigger and active low set and reset. I think i can build the d flip flop counter, but how do i make it so it goes from 1 to 6, and leaves out 000 and 111?
     
  2. t_n_k

    AAC Fanatic!

    Mar 6, 2009
    5,448
    782
    I'm guessing you know you will need 3 D flip-flops. Write the excitation table (given current and next flip-flop states) for each of the D inputs and reduce to minimum logic using a minimization method of your choice. Implement the minimized logic using gate types of your (or the examiner's) choice.
     
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