Help with a circuit please

Discussion in 'Homework Help' started by kruiz, Dec 15, 2008.

  1. kruiz

    Thread Starter New Member

    Dec 15, 2008
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    Hi there,

    I have to design a Up/Down counter. I can use as many logic gates, combinatinal and secuential blocs that I need.
    The input signal E as well as the output signal S are represented in complement a2.
    E rang goes from [-32,31] and S goes from [0,31].
    What would be the bus value from the in and out.
    I thin E would be 7 bits and S 6 bits

    Circuit SPECS
    a) The circuit has a clock in
    b) C1 in
    c) C0 in

    C1.....C0..... S+
    0 ...... 0...... S
    0 .......1...... (S+1)mod32
    1....... 0 ......(S-1)mod32
    1 .......1....... Emod32


    Functional Decimal table of the circuit
    E.... S...... C1...... C0....... S+
    -31. x....... 1 ........1......... 1
    x ....1....... 0........ 1 .........2
    x ....2....... 1........ 0 .........1
    x ....1....... 1........ 0......... 0
    x ....0....... 1........ 0........ 31


    Thx
     
    Last edited: Dec 15, 2008
  2. RiJoRI

    Well-Known Member

    Aug 15, 2007
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  3. veritas

    Active Member

    Feb 7, 2008
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    E has 64 possible values, which is 2^6, so it would need to be 6 bits, not 7.

    I'm a little confused about why you say S is in 2's complement notation, since its range is only positive. If it is, in fact, 2's complement, then it would also need to be 6 bits, but only 5 bits are needed to represent [0,31] if not.
     
  4. kruiz

    Thread Starter New Member

    Dec 15, 2008
    6
    0


    Hi veritas;

    You are totally right, E could be only 6 bits while S would do with 5 bits.
    This is a homework from university that I have to do.

    The state of the problem say that both signals (in&out) are represented in 2's complement notation.

    I attach the function table and the block diagram. It is PART A . Board on page 2 is an example of how the circuit works with decimal values.

    Cheers

    P.S HEEEEEEELLLLP!!!!!!!!!!!!!!!!!!!
     
  5. veritas

    Active Member

    Feb 7, 2008
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    It's not clear to me what you are asking. How much of the design have you attempted, and at which point are you stuck?

    The PDF doesn't really help because the parts I can read are what I already understand.
     
  6. kruiz

    Thread Starter New Member

    Dec 15, 2008
    6
    0
    Hi Veritas;

    The exercice is asking me to design a up/down counter from scrach, which means I must use what I consider to be necessary (logic gates, combinational blocs, secuential block).

    The specificatinos of the circuit are the ones I already told you (2's complementation representation for the IN and OUT). You already know the rang for both signals.

    The way the circuit should work is how it is shown on both boards. Second board is in decimal values just to show an exemple of how would it work.

    So far I do not have anything done yet. I am consfused with the C1 and C0 signals. I dont know from where they come and where they should go.

    If the circuit would have to be a Up counter I would only use a register and a addder. But with this one I am not sure what do I need to use.


    Cheers
     
  7. veritas

    Active Member

    Feb 7, 2008
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    So the next value (i.e. the input) of the S register is going to either be:
    1) S + 1
    2) S - 1
    3) S
    4) E

    Can you build logic for computing each of these individually from the S register? Like you said, S+1 will be an adder, what about the others?

    If you can build them individually, what could you do with a multiplexor?
     
  8. kruiz

    Thread Starter New Member

    Dec 15, 2008
    6
    0
    Let's see what you think;

    So far I have E(6bits) geting into a register. The out of the register goes to an adder.

    I also have a multiplex with 2 in; one with value number 1 and the other with -1, both in 2's complement representation.
    The oout of the multiplex get's into the other in of the adder.

    At this point I have the (S+1) and the (S+1).

    Here comes the doubts:

    1- how can I implement the operation mod?
    2- Since I have C1 and C0 controlling:
    C1.....C0..... S+
    0 ...... 0...... S
    0 .......1...... (S+1)mod32
    1....... 0 ......(S-1)mod32
    1 .......1....... Emod32
    How do I connect this two signals, and where do they come from? Where do they go?

    Cheers
     
  9. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    Did you take a look at the internal logic for that 74193?
     
  10. kruiz

    Thread Starter New Member

    Dec 15, 2008
    6
    0

    Where mate?
    thx
     
  11. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    If Google doesn't work for you, look at the link provided in post #2.
     
  12. veritas

    Active Member

    Feb 7, 2008
    167
    0
    with 6 bits in 2's complement notation,

    A mod32 =
    Code ( (Unknown Language)):
    1.  
    2. A    | ... -3 -2 -1  0  1  2 ... 31 32 33 ...
    3. A%32 | ... 29 30 31  0  1  2 ... 31  0  1 ...
    I'll give you a hint, there's an easy way to convert a number to mod32 if it isn't already, and there's an easy way to tell whether it needs to be done.
    Take a look at the 2's complement notation for the corner cases I've shown.
     
  13. kruiz

    Thread Starter New Member

    Dec 15, 2008
    6
    0
    Hi guys;

    ok, I have a possible circuit although I get a problem when I get in E value -31 and in C1=0 and C0=1, which means (S+1) MOD 32.


    What do you think ?

    I remind that E rang goes from [-32,31] S=[0,31]

    thanks
     
    Last edited: Dec 21, 2008
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