Hello there,

I'm about to develop my first circuit for a project at my university and I think I could need some help. Thanks in advance!

I've got 4 sensors, a microcontroller is to read the outputs. I designed circuits to adjust the voltages to the A/D input of the controller. I protoyped the circuit without the microcontroller and it works just fine.

1) Are there any more capacitors needed to keep interference out? I can't seem to find any information on a) where they're needed in DC circuits, b) how big they should be, c) what type they should be?

2) The PIC and the circuit will not be on the same board, hence the provisory connector. Am I right that the load resistances should be as near to the pic as possible? I figured that it's better to have bigger currents over the wires than small ones.

Is there anything else to improve?

Thanks in advance!

http://img193.imageshack.us/img193/3395/projectp.png

 

Is your input AC or DC?

If AC, you need a filter capacitor on the output of the bridge.

R9 should be 120 Ohms. TR5 should be a 360 Ohm resistor, which is not a standard value. You can use two 180 Ohm resistors in series instead.

You are using odd values for resistors. Here is a chart for standard resistance values:
http://www.logwell.com/tech/components/resistor_values.html
Stick with E12 (yellow columns) or E24 (green columns) values.
For capacitors, use the E6 (salmon columns) values.
The caps on your PIC ADC inputs seem a tad large. Use 10nF to 47nF (0.01uF to 0.047uF). Ceramic or metal poly caps will work well.

You need to have 0.1uF metal poly or ceramic caps across the power pins of any and all IC's in your circuit.

 

Thanks Wookie! The input is DC.

I adjusted resistor values and added 0.1 uF caps across the ICs.

I also use a quad OP amp package; one of those will most probably not be needed... what do I do with it? In the schematic I just grounded the inputs and put a resistor at the output. Is that alright?

Why did those capacitors near the PIC "seem large"?

It seems like everybody always just "knows" the right values . I could imagine that a (DC) circuit got to be "reasonably" stable even at high frequencies due to interference...?
(A logic IC driven with a high frequency clock next to a DC circuit... will lead to a lot of HF interference due to short switching times of the transistors?)

...So these caps introduce (low pass) poles which stabilize the system's transfer function...?

I haven't had any lectures about RF / high frequency analysis yet, so maybe that's what I'm missing?

http://img94.imageshack.us/img94/562/project2p.png

 

Thanks Wookie! The input is DC.

OK, if the input is DC, you might just use a single diode to protect against reversed input connections, rather than a full bridge. Otherwise, you'll get roughly 1.4v drop across the rectifier instead of roughly 0.7v across just one.

I adjusted resistor values and added 0.1 uF caps across the ICs.

OK, but you still have pots with odd values. If you are pretty certain what the value range might be, then instead of using a pot value of 19k, you might use a fixed 18k resistor in series with a 2k pot. The combination will give you an adjustment range of 18k to 20k. If you are less certain of the range you need, you could go to a lower value fixed resistor, and a larger value pot.

Pots are generally available as 100 Ohm, 200 Ohm, 500 Ohm, 1k, 2k, 5k, 10k, 20k, 50k, etc up to 1 MEG.

I also use a quad OP amp package; one of those will most probably not be needed... what do I do with it? In the schematic I just grounded the inputs and put a resistor at the output. Is that alright?

I would connect the output to the inverting (-) input, and connect the noninverting (+) input to an adjacent input signal. This turns the opamp into a voltage follower/buffer. As long as the datasheet specifies that the opamp is unity-gain stable, this is a good way to make sure the opamp won't oscillate.

Why did those capacitors near the PIC "seem large"?

The ADC needs a low-impedance input, which a cap in the range of 10nF to 47nF will provide. However, if you use really large caps, it can take a long time to charge them up. This can cause a large phase shift (or delay) between a change in your input signal, and the change at the ADC input.

Also, a large cap on a PIC input pin can actually cause damage. When the power is shut down, the cap may still have a charge on it. The only discharge path for the cap will be via the PIC's ESD-protection diodes. They're only rated for around 10mA current. Using a small cap will help to ensure that you won't zap an I/O pin.

It seems like everybody always just "knows" the right values .

Some of us have been at this a week or two longer than you have.

It does tend to get more intuitive as you go along. Knowing the math behind it, and working those brain cells will help a great deal to "get in the ballpark" quickly.

I could imagine that a (DC) circuit got to be "reasonably" stable even at high frequencies due to interference...?
(A logic IC driven with a high frequency clock next to a DC circuit... will lead to a lot of HF interference due to short switching times of the transistors?)

Yep - absolutely. You can slow the rise and fall times of adjacent logic signals using RC networks. This will make the logic waveforms look a bit strange, but overall the circuit will have a great deal less noise.[/QUOTE]

...So these caps introduce (low pass) poles which stabilize the system's transfer function...?

Yes.

I haven't had any lectures about RF / high frequency analysis yet, so maybe that's what I'm missing?

Could be.

Microchip has some design notes/application notes for ADC usage on their site. Be sure to read them before you build your board.

Sparkfun.com has a good tutorial on Cadsoft's Eagle. I suggest that you go through it a couple of times.

Use ERC early, and often. ERC (error check) is your best friend in Eagle. It will tell you all of the things that it doesn't like. If you do not correct these errors before creating a board, you will have a mess on your hands.

You have missing junctions in your schematic. Eagle's ERC will tell you exactly where these junctions are missing. Basically, any place that three or more wires and/or pins come together requires a junction. A single wire connecting to a component pin does not require a junction. However, you may need to move the component to a new location, and then move it back to cause the connection to be made - or temporarily place a junction and then delete it.

 

OK, but you still have pots with odd values. If you are pretty certain what the value range might be...

Ah, that's what you mean. These values represent the resistance the potentiometers are supposed to be tuned to. It seems like that's not how it's usually done, hm? Alright, I'll adjust the values to represent the maximum value of the pot.

I would connect the output to the inverting (-) input, and connect the noninverting (+) input to an adjacent input signal.

Yea, that's a better solution. Done!

The ADC needs a low-impedance input, which a cap in the range of 10nF to 47nF will provide. However, if you use really large caps, it can take a long time to charge them up. This can cause a large phase shift (or delay) between a change in your input signal, and the change at the ADC input.

Ah yea, that makes sense. Thanks for clearing that up .

I've heard that before, that a capacitor before an output leads to the next stage "seeing" a lower impedance input. Is that because the cap acts as a buffer, providing charge immediately? It should not matter what's "behind" that capacitor then as the current originates from the capacitor and not the circuitry behind it. Hence the effect is a lower impedance output as long as the capacitor has (enough) charge left. This would also mean that the output impedance should be a function of the current you draw from it. The more you draw, the higher the impedance because not all of the output current will flow from the capacitor but also from the (higher impedance) circuitry behind it.

Does that sound about right? It certainly feels like it. Are voltage followers as impedance converters then used when more flexibility in regard to current is desired? Because... other than that, a capacitor would be sufficient, no?

Yet again, thanks alot Wookie! I'll be back later with an updated schematic.

 

Ah, that's what you mean. These values represent the resistance the potentiometers are supposed to be tuned to. It seems like that's not how it's usually done, hm? Alright, I'll adjust the values to represent the maximum value of the pot.

Well, when you are generating a schematic, use the actual value (resistance, capacitance, etc) of the procurable item in the value field. You can use the TEXT tool to put a note to yourself to "Adjust to xx Ohms" or "Set TR1 to where test point n reads 3v to ground" etc.

I've heard that before, that a capacitor before an output leads to the next stage "seeing" a lower impedance input. Is that because the cap acts as a buffer, providing charge immediately?

Yes.

It should not matter what's "behind" that capacitor then as the current originates from the capacitor and not the circuitry behind it. Hence the effect is a lower impedance output as long as the capacitor has (enough) charge left. This would also mean that the output impedance should be a function of the current you draw from it. The more you draw, the higher the impedance because not all of the output current will flow from the capacitor but also from the (higher impedance) circuitry behind it.

Does that sound about right? It certainly feels like it.

That's about right. If you are going to sample the voltage on the input more often than about every 50mS, you should really use an opamp as a voltage follower/buffer along with a small cap.

Are voltage followers as impedance converters then used when more flexibility in regard to current is desired? Because... other than that, a capacitor would be sufficient, no?

A cap simply tends to maintain an average voltage across itself when fed from a high impedance source.

It's basically a low-pass filter.

 

Whew, busy days. Thanks alot Wookie, it's really appreciated .

 

I updated the schematic yet again and added the following:

1) Light sensor, circuit as in the datasheet
2) Each output now has a Zener diode to protect the input of the microcontroller. Are the resistor values alright...?
3) A 10uF capacitor across R1 to filter out interference. This is because the AD592 temperature sensor will not be on the board but nearby; connected via a wire. Is 10uF too big? Could something bad happen when you turn off the power supply...? What's the criteria for "might damage a device when power is switched off" anyway...?
4) Changed the rectifier at the input to a diode

Could anyone lend me a hand? Thanks!

http://img191.imageshack.us/img191/5020/project3.png

 

You're using Cadsoft's Eagle, but you are not using the Erc function.
Use Erc early, and often. If you don't, you will have a big mess.

You must place a junction if there is a wire intersecting another wire. You don't have to use a junction when connecting a wire to a pin - unless there are more than 1 wire connecting to a pin.

Why use Zeners to protect the uC's inputs, if you are using the same Vcc for everything? They are OK if you might have higher voltage inputs, but will cause strange problems if you are working with low current levels.

 

Use Erc early, and often. If you don't, you will have a big mess.

Eh, I was begging for it wasn't I . Thanks for the remainder yet again! Better get into those habits early indeed...

Why use Zeners to protect the uC's inputs, if you are using the same Vcc for everything? They are OK if you might have higher voltage inputs, but will cause strange problems if you are working with low current levels.

Yea, the circuit's gonna be supplied by 12V; the uC gets only 3.3V.
Problems with low current levels... hm, but that should be only near the breakdown voltage, no?

 

Are you going to use this circuit in an automotive environment, or just with a 12v supply?

 

Just with a 12V supply.

 

I have too many things going on; can't keep track of everything.

Use 0.1uF bypass caps on the supply pins of all of your IC's and sensors.

Use a 10nF (0.01uF) cap on each ADC input to ground. This gives the ADC a low impedance source for it's voltage sample, but is not so large as to cause problems when you turn the power off, and there is still voltage on the cap; the built-in ESD diodes will discharge the cap.