Help needed in debugging a circuit with JK flipflop

Discussion in 'The Projects Forum' started by stragulus, Feb 9, 2016.

  1. stragulus

    Thread Starter New Member

    Feb 9, 2016
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    Hi,

    This is my first post here! I'm software engineer with some light experience in electronic engineering, mostly self-taught.

    I am attempting to repair an old ADM-3A serial terminal. I've already repaired two, but this one is a real struggle. Using a logic analyzer I have been able to find a problem involving a JK flipflop (74LS113): http://freedatasheets.com/downloads/74LS113.pdf

    So this flipflop has a functioning clock on pin 13, SET (pin 10) is always high, J (pin 11) is always high, and only K (pin 12) toggles between high and low. K is low if the terminal does not receive input (from an UART). This is the LOAD(1) operating mode for the flipflop, e.g. Q (pin 9) will be 1 and /Q (pin 8) will be 0. Now, when the terminal receives input, K will go high. Now as soon as the clock goes down, it should execute the TOGGLE operating mode, thus flipping Q to 0 and /Q to 1. However, this does not work as intended: /Q does always go to 1, but Q will generally stick at 1. Sometimes (let's say 1 in 5..10 times) Q will *very* briefly pulse to 0 at the same time /Q flips to 1, although the pulse is much shorter. Even weirder, when the clock goes back up again, /Q will always flip back to 0 again. AFAIK they both should only toggle at the next time the clock goes down (negative edge trigger).

    Let me demonstrate this with a picture. Here is a screenshot from the logic analyzer that demonstrates the behavior. In this screenshot, INPUT is input K (pin 12), DOIT is /Q (pin 8). I have also connected pin 10 (SET) and 11 (J) that are always high but they are not labeled here. Clearly you can see here how /Q (DOIT) bounces back when the clock goes up again (which it shouldn't), and also that Q (/DOIT) doesn't even flip.

    Rusty 2016-01-24 05.png

    Luckily I also have a Known Good ADM-3A terminal so I can also show what SHOULD happen:

    Lusty 2016-01-24 03.png

    Note how DOIT and /DOIT are each other's opposites, as one would expect, and how they only change when the clock does down.

    Ok, long story, but now here's my question: What could possibly cause this odd behavior on the broken ADM-3A? I have switched the flipflop from bad to good ADM-3A: it works there. Also, the flipflop from the good ADM-3A works in the bad ADM-3A, same exact symptoms. So that rules out a broken 74ls113 itself.

    Could it be explained by output Q somehow tied high by another malfunctioning component in the circuit? Because it seems that /Q (DOIT) gets triggered correctly, but Q itself not so much, except for the occasional brief pulses (which seems worrysome). What else can I look at to debug this further?
     
  2. MrChips

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    Oct 2, 2009
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    I will get back to you after I dig out and study the ADM-3A manual. Which 74LS113 are you referring to? Is it B3?
     
  3. stragulus

    Thread Starter New Member

    Feb 9, 2016
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    Yes, it is B3 indeed. FYI I also switched out the UART with the good and bad ADM-3A since DOIT is connected to it, and they both work ok in the good one.
     
    Last edited: Feb 9, 2016
  4. MrChips

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    Luckily for you I have a working ADM-3A and the manual. I have built a number of these in the past.
    Debugging this problem will have to wait for another day after I get a chance to scope it.
     
  5. stragulus

    Thread Starter New Member

    Feb 9, 2016
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    That is very fortunate indeed! Meanwhile, perhaps you can shed some light on a basic question. I was under the assumption that the inputs SET, J, K and CLOCK on the flipflop alone would determine Q and /Q. But since the flipflop works fine in the good adm-3a, that must not be true. Ergo, what, if you look at just the isolated flipflop, could in general cause such behavior? Is my assumption wrong because Q and /Q are also each other's inputs? And if something else that is wired to Q and /Q puts 5V on those lines, something like this could happen? I guess it's more a generic electrical engineering question also.
     
  6. MrChips

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    We will make the assumption that the 74LS113 flip/flop at U10 (labelled B3 in the schematic) is fine.

    What are your basic symptoms?

    1. On power up, do you hear a "beep"?
    2. Do you get a cursor on the left top corner of the screen?
    3. Have you tried a loop-back test, i.e. jumper pins 2 and 3 at the MODEM connection and type a character. Anything appears on the screen?
    4. Does CTRL-G give a "beep"?

    I presume you have an oscilloscope. Check all voltages from the power supply for ripple.
    Check all voltages for correct voltage.

    Check the +5V supply line for ripple.
     
  7. MrChips

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    Here are some more things for you to do.
    Get a digital voltmeter and measure the voltages to 2 decimal places at the pins of the 74LS113, U10.

    I presume the IC's are socketed in both the working and non-working ADM-3A.

    If so, remove the 74LS42 (J2) at U102 from the bad ADM-3A and replace it with a good one (only if the IC's are in sockets).
     
  8. stragulus

    Thread Starter New Member

    Feb 9, 2016
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    I do not have a scope sadly, just the (usb) logic analyzer.

    The things I've observed to work on this terminal:

    It doesn't beep at turn-on (actually, nor does my other adm-3a)
    I do get a cursor on an otherwise black screen.
    CTRL-G beeping I haven't checked, it's in parts right now so I might check that later. The good adm-3a does though.
    Loop-back test doesn't work

    I've done some fairly extensive debugging of the digital logic, and that is where I am stuck now. Let me explain.

    What does work, is that input typed on the keyboard will show up in realterm when connected through a null modem cable

    What also works, is characters typed in realterm register on the serial input pin, and I can see that this data is correct using the logic analyzer. It also shows in parallel form on the latches at K4/L4 as DATA0..6. What I do not see however, is the WRITE pulse on the memory IC's that will trigger saving the character into memory. One of the things that needs to happen for the WRITE pulse to happen is FORESPACE. FORESPACE is never 1 however. FORESPACE requires XCLK to happen, which doesn't happen either. XCLK is combined from CC80A and DOIT on IC at position C3. CC80A pulses are there, but the DOIT pulse, that must overlap with CC80A, is too short and therefore XCLK can never be set. So DOIT is not working right, and that led me to the analysis I wrote up in the first post. If you revisit that, you see the DOIT pulse is terminated prematurely, while on the good ADM-3A you see that the DOIT pulse is wider and only resets as on the negative edge of the clock of the flipflop as one would expect.

    +5V (and -12V at the UART) measured OK with a multimeter, but as to whether it has a ripple..can I figure this out without a scope? Maybe I should just get one, it's been on the wishlist for so long.

    RE J2: I have already pulled it from the bad ADM-3A, it looks like it should still give me a working DOIT without the decoder chip in there. It's not socketed on the good ADM-3A so do you think I should bother?
     
  9. stragulus

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    Feb 9, 2016
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    ^^ +5V at 74ls113 measures 5.02V
     
  10. MrChips

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    I would like to know the voltages at all pins 1 to 14.
     
  11. MrChips

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    Don't go pulling chips if they are not in sockets. We'll find a way to find the problem otherwise.
    Pulling chips can do more harm than good unless you are certain that you have narrowed it down. If you do pull chips, make sure you put in sockets.
     
    Last edited: Feb 11, 2016
  12. stragulus

    Thread Starter New Member

    Feb 9, 2016
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    Don't worry, I'm quite proficient in (de)soldering chips. I had already taken this one out before I posted here to see if this was interfering with DOIT.

    Here's the voltages on the B3 pins (J2 still out of circuit, everything else is there):

    1 2.08
    2 0.92
    3 0.82
    4 4.36
    5 2.49
    6 1.56
    7 0
    8 0.12
    9 4.97
    10 4.37
    11 5.02
    12 0.16
    13 3.73
    14 5.02
     
  13. MrChips

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    Thanks for posting the voltages. I cannot see anything at fault there.

    Your understanding of the operation of the 74LS113 J-K flip-flop (B3) at U10 is accurate. Assuming that the /PRESET pin is held high by /CLEAR1 and J-input is high, Q and /Q should toggle when K (INPUT) is high on the next falling edge of the clock /LCCLK. Q should return to high and /Q to low on the next falling edge of the clock when INPUT is low.

    Now let us examine when, where and why a working 74LS113 might malfunction given your symptoms:

    1) Vcc not in proper operating range of 4.75-5.25V
    2) Noise on Vcc.
    3) Ground bounce, i.e. noise on GND.
    4) Q (pin-9) is stuck high.
    5) Noisy clock input /LCCLK especially on the signal transitions.
    6) Noise on the /PRESET input /CLEAR1

    So what can we do?

    I would suggest, after the unit is powered on, jumper the /PRESET at pin-10 to Vcc to eliminate problem (6) above.
    (Or you can try a 10nF to 100nF ceramic capacitor between pin-7 (GND) and pin-10. You solder this with the power off, of course). If that has no effect, restore it back to normal.

    Next, solder a 0.1μF (100nF) ceramic capacitor between pin-7 (GND) and pin-14 (Vcc). Keep the leads of the capacitor as short as possible. This should take care of problems (2) and (3) above. Leaving this in the circuit will do no harm.

    If that doesn't help, solder a 1nF to 10nF ceramic capacitor between pin-7 (GND) and pin-13 (CLK) to attempt to solve (5) above.

    For other AAC members who are interested or just curious, here is what we are working with:

    74LS113.jpg ADM3A 6B3.jpg

    Schematic of ADM-3A Sheet 6
    ADM3A Sheet 6.jpg
     
    Last edited: Feb 12, 2016
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  14. stragulus

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    Feb 9, 2016
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    Thank you for your excellent description of how to diagnose this. I understand all the steps and why they should be done, this is very insightful. I'll update here with any new findings.
     
  15. MrChips

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  16. ScottWang

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    Aug 23, 2012
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    The TTL logical level as low = 0~0.8V, high = 2V~5V.
    So 2 and 6 have some problems, maybe damaged or it's related circuit caused that.
    1 2.08
    2 0.92
    3 0.82
    4 4.36
    5 2.49
    6 1.56
    7 0
    8 0.12
    9 4.97
    10 4.37
    11 5.02
    12 0.16
    13 3.73
    14 5.02
     
  17. MrChips

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    @ScottWang
    The unusual TTL voltages measured are because these are clocked or changing TTL levels. The DVM is measuring average voltages.

    I observe similar voltage readings on a working ADM-3A terminal.
     
  18. ScottWang

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    If using the DVM to measured then it really needs another ADM-3A to comparing, using O'scope is more useful.

    If the terminal has CPU and eprom inside then it could turn off the terminal and take away the CPU or eprom to stop working and turn on the terminal again, and using the DVM to do the measuring.
     
  19. MrChips

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    The Lear Siegler ADM-3A "Dumb Terminal" is a classic pre-microprocessor design from 1974. It has no microprocessor and uses 74LSxxx TTL chips except for the GI AY-3-1015D UART, RAM chips and a character ROM.

    It was available as a kit or preassembled. I helped put together about a dozen or more of the ADM-3A kits. We still use them for testing COM problems if Hyperterminal is not available.
     
  20. ScottWang

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    Aug 23, 2012
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    MrChips
    If you have been seeing the board then you probably know that must be have crystal or some oscillators to make the logic working, try to stop the oscillation and then measuring the logic level of logic ic, sometimes unnecessary to desodering the ic.
     
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