Help Designing Quantum Random Number Generator

Thread Starter

philipm

Joined Jun 27, 2012
47
I'd like to build a true random number generator. The gold standard appears to be using quantum phenomenon.

One approach (thank you Wikipedia.org) is:
Amplification of the signal produced on the base of a reverse-biased transistor. The emitter is saturated with electrons and occasionally they will tunnel through the band gap and exit via the base. This signal is then amplified through a few more transistors and the result fed into a Schmitt trigger.
This is the approach I would like to take. I understand the basic working principle, but have no idea where to start designing the circuit. I have experience with microcontrollers, so if I can amplify the signal to a 0-5v range, I can use an ADC to turn it into digital information.

As I plan to hook up the microcontroller via USB and have an existing board in mind, there are some design considerations/constraints:
- Vcc is 5V (3.3v is available also, but with only about 20mA available)
- no more than 100mA (though ideally a lot less)
- low component count and SMD devices (quicker and easier to make!)
- shielding? Noise immunity (other than quantum tunneling noise) is essential!
 

Sensacell

Joined Jun 19, 2012
3,432
Neat idea! Base-emitter breakdown voltage is usually greater than 5V, so things get tricky if you don't have other voltages available. I use random numbers all the time, I use a simple analog oscillator running @ 100 Hz or so, (the more sketchy the better, use hi -Z values and give it an antenna at a critical node to pick up noise!) then use this to gate a counter running in the micro at Mhz frequencies. Maybe it's not "quantum random" but it works for most applications.
 

Thread Starter

philipm

Joined Jun 27, 2012
47
I think base-emitter breakdown above 5V causes avalanche noise, which although easier to work with, is not quite as random (it's more physical than quantum). I believe quantum tunnelling occurs at lower voltages. Though I am really a beginner in regards to the theory!

I do like what you've done and sounds great for a lot of applications. I'd really like to go down the route of quantum tunnelling though as there aren't many properly random solutions out there and those that are are very expensive.

I forgot to mention in the initial post that if the project is successful, I would like to make it share-alike open source (both hardware and software), potentially as an Arduino shield or Arduino like clone. Though of course, no guarantees at this stage that it will make it far enough to be a viable project!
 

WBahn

Joined Mar 31, 2012
29,978
I'm not sure, but my guess is that you won't be able to do this with discrete parts. It sounds like it involves single electron event counting and that is something that is pretty tractable in a custom IC circuit where you can get device capacitances down into the range, namely on the aF scale, were a charge of a single electron on the cap is enough voltage to gate a switch.
 

Wendy

Joined Mar 24, 2008
23,415
Actually, with a true noise source, it should be doable. Zener diodes are well known white noise generators (which is what I interprete what you are talking about). Sampling frequency would be somewhat determined by a low pass filter in front of the gate (Schmitt Trigger?) after the noise source.

I've had a similar thought for decades, I will be following this thread with interest.
 

THE_RB

Joined Feb 11, 2008
5,438
If you want a relatively simple algorithm to produce very high entropy random data (even from poor quality organic input like an oscillator) have a look here;
http://www.romanblack.com/black_rng.htm
there is also a software program there that you can use to generate 1Mbit of high quality random data for any use you might have.

Don't get too hung up on the whole "quantum" thing it's just a buzzword people use to market their overpriced RNGs. Any reasonably organic noise source can produce fantastic quality entropy, especially if you don't need a very high datarate.

Some MIT guys (if I remember right) were doing it using a camera watching a Lava Lamp! :)
 

Wendy

Joined Mar 24, 2008
23,415
If you have any schematics I would be interested. My thought on the low pass filter would determine the number range. Simplicity and true randomness is a must.
 

THE_RB

Joined Feb 11, 2008
5,438
Was that comment for me Bill? Sorry I don't have schematics, my RNG is an algorithm ie a procedure to scramble bits in a very large array.

For simplicity and pure randomness you can run a neon tube oscillator or some other breakdown (relaxation) type oscillator, against a very fast digital oscillator. When the neon tube triggers it gates the state of the fast digital osc which has an equal chance of being either 0 or 1. That will produce one "bit" per neon triggering.

Given sufficient speed difference between the slow osc and the fast one the gated bit will be "perfectly" random as the period noise of the slow osc is sufficiently larger than the period of the fast osc. With PICs you can run a slow RC osc on one pin, and compare to the internal timer which runs at MHz.

It depends what you want the data for? ie the datarate and if each bit must be equally timed. :)
 

Thread Starter

philipm

Joined Jun 27, 2012
47
Thanks for all the replies. I am actually keen to pursue a quantum based hardware random number generator.

To focus on the random generator part, it seems we have two possible approaches, both using reverse biasing. In both approaches, it seems we would generate, amplify and then digitise.

If we used a Zener, anyone know what a circuit would look like (or be able to design one)?

With a reversed transistor, what sort of signal would we expect on the base? Anyone able to try it? (I don't have any accurate test equipment sadly.)

Another key question - does either approach have a significant benefit (or drawback)?
 

THE_RB

Joined Feb 11, 2008
5,438
Amplifying the noise from a semi junction is only half the battle, the important part is the digitising and converting to an actual number, if you want random numbers. Otherwise you just have a noise source which was amplified to clipping.

That is why you need to give a specification, as to what datarate you need out of the device and whether it is externally clocked or needs to be be a fixed freq output rate etc etc. Once you know what you need out of it you can put together a design to give the best entropy possible or circuit simplicity or some combination.

If you want something good you are better off doing what the commercial units do; use an organic noise source into a math algorithm that takes care of things like the datarate and the 0-1 bias etc. If you don't want a micro in there you will need to do that part with logic gates and flip flops, and probably won't get as good a result.
 
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bretm

Joined Feb 6, 2012
152
There's a good circuit at http://www.cryogenius.com/hardware/rng/ which works well, but it needs 12V not 5V for the transistor avalanche. I built the first stage and used the random bit output as a purposefully jittery clock input to a 4-bit counter (or you could use a decade counter) and then sampled the counter at a slow regular interval to get random hexadecimal digits which I displayed on 7-segment LEDs. I have it sitting on my desk and have used it for a couple of years to generate passwords for web site accounts.
 

THE_RB

Joined Feb 11, 2008
5,438
Hi Bretm, that's a great idea for a desk-toy project! :D

How did you deal with the 0-1 bias? Did you use the vonNeuman whitening system on 2bit pairs or (my own favorite) just inverting every second bit?
 

Thread Starter

philipm

Joined Jun 27, 2012
47
Thanks THE_RB, appreciate your direction to help tailor the requirement more precisely.

I'll be using the ATMEGA328P microcontroller running at 16Mhz. This has a 10 bit ADC that is theoretically capable of 77kHz. In reality I need to shift the data off the chip, so would be targeting 10kHz. The ADC has a configurable range (through a reference pin), but a GND-5V or GND-1.1V range is available on the chip as a software configurable option (this is my preference). The embedded software will take care of all the timing, so all I really need (I think) is the amplified random source.

I actually have up to 8 ADC channels, though due to multiple pin use, I'd probably use up to 4. So in theory, I could have multiple sources. It could be quite fun to test a reverse bias Zener against a reverse biased transistor.
 

bretm

Joined Feb 6, 2012
152
How did you deal with the 0-1 bias? Did you use the vonNeuman whitening system on 2bit pairs or (my own favorite) just inverting every second bit?
I just didn't bother, for a desk toy. There is a measurable bias in the digits produced, which I found acceptible. A real application should do whitening.

I couldn't use the "invert every second bit" method because it's a jittery clock, not a bit stream. I'm using the random pulse width as the data, not the logic level. The bias in my application actually comes from clocking too fast with a ripple counter--some counts take longer to transition than others.
 

THE_RB

Joined Feb 11, 2008
5,438
To Philipm; that should be easy enough if you are using the ATMEGA micro, you could amplify the noise in a linear fashion but make sure the output signal from the amp does not clip, so aim for 1v or 2v peak to peak and centred around half Vdd or 2.5v.

Then sample at a fixed freq with the ADC and just use the least significant bit of the ADC register as your "random" bit. Then if you want to remove any 0-1 bias (which may not be needed) you could use whitening in software.

You could also feed the new random bit into a LCG or other type of math RNG like an xor/shift which are very easy to do in software.

This is a 16bit xor/shift RNG in C, that I adapted from the microchip RNG appnote (theirs was in assembler).
Rich (BB code):
		// 16bit xor-shift psuedo RNG 
		// The random data is in two bytes; randH and randL
                // the randTEMP byte is a working register

		// 1. XOR bits 15^14 into A
		rand_temp = 0;
		if(randH.F7 != randH.F6) rand_temp.F2 = 1;

		// 2. XOR bits 12^3 into B
		if(randH.F4 != randL.F3) rand_temp.F1 = 1;

		// 2. XOR bits A^B into C
		if(rand_temp.F2 != rand_temp.F1) rand_temp.F0 = 1;

		// 4. left shift rand var 1bit
		asm CLRF STATUS			;
		asm RLF randL,f			;
		asm RLF randH,f			;

		// 5. put C in bit 0
		if(rand_temp.F0) randL++;

		// at this point we have created one random bit!
		// it is in the LSB of randL
To Bretm; Thanks for the info on your cool project. :)
 

Thread Starter

philipm

Joined Jun 27, 2012
47
To Philipm; that should be easy enough if you are using the ATMEGA micro, you could amplify the noise in a linear fashion but make sure the output signal from the amp does not clip, so aim for 1v or 2v peak to peak and centred around half Vdd or 2.5v.
That sounds perfect. The only hiccup is that I have no idea how to design the circuit, measure the input noise, or control the amplification to get the input for the ADC.

On the flip side, once I have that circuit, I am very comfortable with converting the schematic into a board, populating it, bootloading and programming the ATMEGA.

I was thinking of possibly amplifying to beyond clipping points and ignoring min (0) and max (2^10) values, then using the least significant bit (or possibly XOR on the two LSBs). The 'lost' samples are not an issue as I can sample faster than I can use the data. Any benefit in this approach? Though I still have no idea how to design the circuit!
 
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