1. RawanHamed

    Thread Starter New Member

    Jan 4, 2013
    We would like to design a 2-decade up/down BCD counter in HDL language using behavioral
    description. Since the counter is a 2-decade one, it is thus able to count from 00 to 99 and then
    back to 00. I need help?:)
  2. RawanHamed

    Thread Starter New Member

    Jan 4, 2013
    I want the code for it?
  3. tshuck

    Well-Known Member

    Oct 18, 2012
    That's great! taking initiative in designing.... attempting... well, you haven't really done... anything, now have you?

    You haven't even told us what HDL you are using! HDL = Hardware Description Language... sounds pretty general to me.

    Your stipulations sound like this is a homework problem, and, as such, needs to be in the Homework Help section of the forum.

    As this is a homework problem, we aren't going to simply hand over the answer, you need to attempt to solve this on your own, after which time, we will be willing to help guide you in the right direction.

    Yes, the answer here is yes....
  4. RawanHamed

    Thread Starter New Member

    Jan 4, 2013
    i write this code but there have an error so can you help me?

    Code ( (Unknown Language)):
    2. module bcd (A,CO,load,up,down,IN,clk,clr);
    3. input load,up,down,clr,clk;
    4. input [3:0]IN ;
    5. output CO ;
    6. output [3:0]A ;
    7. reg [3:0]A ;
    8. assign CO = (up |down )& ~load & (A == 4'b1111);
    9. always @ (posedge clk or negedge clr )
    10. if (clr= 1'b0) A= 4'b0000 ;
    11. else if (load) A = IN ;
    12. else if (up ) A = A + 1'b1;
    13. if (A = 4'b1001) A = 4'b0000;
    14. else if (down) A = A - 1'b1 ;
    15. if (A = 4'b0000) A = 4'b1001 ;
    16. else A = A;
    Last edited by a moderator: Jan 4, 2013
  5. tshuck

    Well-Known Member

    Oct 18, 2012
    Okay, so Verilog... Verilog is the HDL you are using...

    Where is the error? What is the error saying? Also, when posting code, it is best to write comments so that we can see what you are attempting to do, not what you are actually doing....

    How many bits do you need to store 99?

    (HINT: ceil(log_{2}(99)))

    I'd say first thing to do is make an up/down counter that counts from 0 to 99. Then build it up to what you need.
  6. WBahn


    Mar 31, 2012
    I'm assuming there is an 'endmdule' statement somewhere in there?

    You basically have two problems. First, you shouldn't be using blocking assignments for this type of logic. Second, you have mutliple assignments to the same variable within your block. Your logic should be laid out so that even possible input condition leads to exactly one assignment statement.
  7. Brownout

    Well-Known Member

    Jan 10, 2012
    Try using a case statement. You should try to make each case exclusive of all the others. It's OK to use the structure you've chosen, but only if you can't make each case exculsive. (ie, it's kind of a hack)