Hi! So after reading a bunch of the well explained posts/tutorials on generating some solid servo PWM on the forum, they all seemed to contain one 555 timer and at least one transistor somewhere in the circuit. They are probably more accurate then what I'm thinking, but I'd like to get some help with explaining another way of getting around this, that I found.
I would like to set up a circuit with an astable 555 timer (oscillating as close to 50 Hz as I can get it, for servo control frequency), as well as a monostable 555 timer (with period control by a pot).
Astable Mode:
Where R1, R2, and C determine the frequency of oscillation (50 Hz), given by the formula:
\(F = \frac{1.44}{C(R1 + 2R2)}\)
Monostable Mode:
Where R (variable resistor) and C determine the period of "on" time for the pulse, given by the formula:
\(T = 1.1RC\)
Putting It All Together:
The output (pin 3) from the astable timer is connected to the trigger (pin 2) of the monostable timer. From there, the output (pin 3) of the monostable timer is the final PWM signal that can be manipulated by changes in the variable resistor in the monostable circuit.
My Question:
This all looks great to me on paper, but there's just one small thing that I am unsure about. Does the duty cycle of the astable timer signal matter when it comes to triggering the monostable timer signal?
Thanks a lot!
JP
I would like to set up a circuit with an astable 555 timer (oscillating as close to 50 Hz as I can get it, for servo control frequency), as well as a monostable 555 timer (with period control by a pot).
Astable Mode:
Where R1, R2, and C determine the frequency of oscillation (50 Hz), given by the formula:
\(F = \frac{1.44}{C(R1 + 2R2)}\)
Monostable Mode:
Where R (variable resistor) and C determine the period of "on" time for the pulse, given by the formula:
\(T = 1.1RC\)
Putting It All Together:
The output (pin 3) from the astable timer is connected to the trigger (pin 2) of the monostable timer. From there, the output (pin 3) of the monostable timer is the final PWM signal that can be manipulated by changes in the variable resistor in the monostable circuit.
My Question:
This all looks great to me on paper, but there's just one small thing that I am unsure about. Does the duty cycle of the astable timer signal matter when it comes to triggering the monostable timer signal?
Thanks a lot!
JP