gates have a delay

Discussion in 'Homework Help' started by The Rocketeer, Feb 22, 2011.

  1. The Rocketeer

    Thread Starter New Member

    Oct 20, 2010
    7
    0
    Hey guys,
    I have a hard time to find the solution of the attached problem. Its about gates have delay....
     
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  2. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    Have you drawn up a timing chart as yet? That will clarify things.
     
  3. The Rocketeer

    Thread Starter New Member

    Oct 20, 2010
    7
    0
    you are right but I am having hard time with timing chart...
    can you please explain more about it?

    Thank you
     
  4. Georacer

    Moderator

    Nov 25, 2009
    5,142
    1,266
    Make a column with all the nodes of the circuit. Each will correspond to a row with a timeline. Draw the signals as they appear. This will let you understand intuitively the delay propagation.

    Your chart should look like this:
    [​IMG]

    Your vertical increment should be 1ns.
     
  5. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    Set the logic up with the initial state levels. Identify the static output levels, and make the change in C. See when the changes go though the gates.
     
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