gates have a delay

Georacer

Joined Nov 25, 2009
5,182
Make a column with all the nodes of the circuit. Each will correspond to a row with a timeline. Draw the signals as they appear. This will let you understand intuitively the delay propagation.

Your chart should look like this:


Your vertical increment should be 1ns.
 

beenthere

Joined Apr 20, 2004
15,819
Set the logic up with the initial state levels. Identify the static output levels, and make the change in C. See when the changes go though the gates.
 
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