Hi all: I have a question on design a logic circuit that accepts a four digit binary input and creates a sign check bit. Here I am taking a,b,c and d as the value and getting only output as a. For four inputs and single output equivalent to one output of a. how do you design the gate?

 

Create a truth table first post it here,design of the gate is not so hard after that.

Good luck

 

the requirement is The sign bit is set to 1 if the left most bit of the data is 1.

the truth table is
A B C D s
0 0 0 0 0 0
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 0
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 0
8 1 0 0 0 1
9 1 0 0 1 1
10 1 0 1 0 1
11 1 0 1 1 1
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1

here, s(a,b,c,d)=SUM (8,9.10,11,12,13,14,15)
which in k-map produces 'a'

 

If your requirement is exactly what you stated at post #3, then all is good.
It looks too easy to be true though. Are you sure this is what you have to find?

 

well, the problem is how to represent this
s(a,b,c,d)=SUM(a)
in a logic gate? Gates I can use are AND, OR and NOT.
Thanks

 

You don't need a gate for that. You just drive "a" to the output. It's candy from a baby.

That's why I ask you if the question is different. It is just too easy.