Gate delays

Discussion in 'Homework Help' started by Fatima Rashd, Dec 27, 2015.

1. Fatima Rashd Thread Starter New Member

Dec 27, 2015
4
1
Assume that tpd is the average of tPHL and tPLH. Find the delay from each input to the output in the circuit shown below by

(a) Finding tPHL and tPLH for each path, assuming tPHL = 0.20 ns and tPLH = 0.36 ns for each gate. From these values, find tpd for each path.

(b) Using tpd = 0.28 ns for each gate.

(c) Compare your answers from parts (a) and (b) and discuss any differences.
tPHL-C,D to F = 2 tPLH + 2tPHL = 2(0.36) + 2(0.20) = 1.12 ns
tPLH-C,D to F = 2tPHL + 2tPLH = 2(0.20) + 2(0.36) = 1.12 ns.

2. WBahn Moderator

Mar 31, 2012
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1) Showing the circuit that this problem is about (the crystal balls we all got for Christmas are still charging).

Dec 27, 2015
4
1
4. Fatima Rashd Thread Starter New Member

Dec 27, 2015
4
1
Extremely sorry.I was trying to understand the answer for 3 hours and tired after exhaust searching that's why such a stupid mistake I did.

sailorjoe likes this.

Mar 31, 2012
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