Hi all

Request some help in giving some hints to start with :

A one-bit full adder is to be implemented using 8-to-1 multiplexers
(a) Write the t ruth table for sum (S) and carry to the next stage CN in terms of
the two bit (A, B) and carry from the previous stage (CP) . The t ruth table
should be in the ascending order of (A,B,CP).

(B) Implement S and CN using 8-to-1 multiplexer.

Thanks and regards

 

Well the truth table is the easy part


A B C-P Sum C-N
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

 

well calm down chirag,
and avoid using such offensive language,
that language is for illiterates not deprived of education but common sense.
the above ckt can easily be made using 4:1 mux,
however i think two mux wud be req in any case ,one for carry and other for sum,
the ckt is very simple,
observe for what i/p the sum or carry o/p is high and for what low.
based on these i/p apply logic 1 or logic 0 at i/p of respective data lines.

example:
for sum:
d0,d3,d5,d6
wud be given logic 1,
while
d1,d2,d4,d7
wud be given logic 0.
now a,b,cp
are inputs to selection lines for mux taken in order.
same method wud apply for c n o/p.