Other posts were old or difficult to read. Here is an example of a full adder not using Exclusive-OR gates.
You can find more info on data sheets for 7480 or ITT9304.

Approach:
What input conditions are required to make the Sum output a high?
What input conditions are required to generate a Carry out?

So why does the 7480 and 9304 have so many more inputs? These devices can add, subtract, create parity checking, convert grey to binary ...
Check out the data sheets for these devices. Examples of use are usually shown.

 

When you want to analyze the circuit of logic gates, the best way is to write down the truth table and label the input and output of all logic gates.

 

When you want to analyze the circuit of logic gates, the best way is to write down the truth table and label the input and output of all logic gates.

Nothing wrong with that at all. I did it in the classroom. Never used it on the job. Wrong jobs I guess.

 

Nothing wrong with that at all.

When you complete the job then the problem will be solved.

 

When you complete the job then the problem will be solved.

Have you ever resorted to a truth table on the job?

 

Have you ever resorted to a truth table on the job?

I never did that, what I thought is that the ee engineers or hobbyist don't have the methods to memory the in/out and Hi/Low of logic gates, so they need to do the truth table, when they can do that then they won't need it.

I will draw the complete circuit for all logic gates and label the 1/0 to the I/O pins then I will find out which gate has the problem.

What I memory are:
AND gate - when anyone of input is 0(low) then the output will be 0(low).
OR gate - when anyone of input is 1(hi) then the output will be i(hi).
NAND gate - when anyone of input is 0(low) then the output will be 1(hi).
NOR gate - when anyone of input is 1(hi) then the output will be 0(low).
...
...

 

I never did that, what I thought is that the ee engineers or hobbyist don't have the methods to memory the in/out and Hi/Low of logic gates, so they need to do the truth table, when they can do that then they won't need it.

I will draw the complete circuit for all logic gates and label the 1/0 to the I/O pins then I will find out which gate has the problem.

What I memory are:
AND gate - when anyone of input is 0(low) then the output will be 0(low).
OR gate - when anyone of input is 1(hi) then the output will be i(hi).
NAND gate - when anyone of input is 0(low) then the output will be 1(hi).
NOR gate - when anyone of input is 1(hi) then the output will be 0(low).
...
...

Then there are exclusive OR's, exclusive NORs and Majority input gates. f most of the inputs are high the output is high, If most of the inputs are low the output is low. I don't think that one ever made it into CMOS or TTL modern families. 9109, Dual 3-input Majority input gate.

(edited to add ...)

Oh, yes. 4530 Dual 5-input Majority input gate. MC14530 was it? It was an OR / NOR output.

 

FWIW: I used truth tables in designs on numerous occasions, but certainly not every occasion. It all depended on whether I believed that a truth table was the most appropriate way of communicating the point I needed to get across to the people I was trying to communicate with. When documenting control decoder logic, truth tables were a very effective way of doing that. When describing the functionality of a block to fellow engineers a truth table might be too simplistic, but when describing the functionality of that same block to the customer a truth table might be all that allowed them to grasp enough of what was going on in order to be comfortable that our design was actually meeting their needs.

 

Then there are exclusive OR's, exclusive NORs and Majority input gates. f most of the inputs are high the output is high, If most of the inputs are low the output is low. I don't think that one ever made it into CMOS or TTL modern families. 9109, Dual 3-input Majority input gate.

(edited to add ...)

Oh, yes. 4530 Dual 5-input Majority input gate. MC14530 was it? It was an OR / NOR output.

The XOR gate is a half adder, so that is when the inputs are the same then the output will be 0(low).

The XNOR gate is a half adder and adds an inverter, so that is when the inputs are the same then the output will be 1(hi).

In logic gates, it seems no "most of inputs" this function, only the anyone of input and all inputs.

 

FWIW: I used truth tables in designs on numerous occasions, but certainly not every occasion. It all depended on whether I believed that a truth table was the most appropriate way of communicating the point I needed to get across to the people I was trying to communicate with. When documenting control decoder logic, truth tables were a very effective way of doing that. When describing the functionality of a block to fellow engineers a truth table might be too simplistic, but when describing the functionality of that same block to the customer a truth table might be all that allowed them to grasp enough of what was going on in order to be comfortable that our design was actually meeting their needs.

Yep, I never had that task.

 

The XOR gate is a half adder, so that is when the inputs are the same then the output will be 0(low).

The XNOR gate is a half adder and adds an inverter, so that is when the inputs are the same then the output will be 1(hi).

In logic gates, it seems no "most of inputs" this function, only the anyone of input and all inputs.

An XOR gate is not a half adder. It is part of a half adder. A half adder must also produce the carry out logic.

 

An XOR gate is not a half adder. It is part of a half adder. A half adder must also produce the carry out logic.

I thought if it created a Carry it would be a full adder.

 

I thought if it created a Carry it would be a full adder.

Nope.

A half adder lacks a Carry In signal, so it takes two 1-bit inputs and produces a 2-bit output.

A full adder accepts a Carry In from the prior bit position, so it takes three 1-bit inputs and produces a 2-bit output.

The names from a full adder being the "adder" and one of the classic constructions of an adder being the use of two "half adders".

 

Nope.

A half adder lacks a Carry In signal, so it takes two 1-bit inputs and produces a 2-bit output.

A full adder accepts a Carry In from the prior bit position, so it takes three 1-bit inputs and produces a 2-bit output.

The names from a full adder being the "adder" and one of the classic constructions of an adder being the use of two "half adders".

That sounds good.