FSM and assertion level problem

Discussion in 'General Electronics Chat' started by limbonic, Oct 28, 2012.

  1. limbonic

    Thread Starter New Member

    Jul 4, 2011
    17
    0
    i have the below FSM :

    [​IMG]

    A is asserted low signal. I wonder if this affects the karnaugh maps.

    for example i make the 3 karnaugh maps [s2,s1,s0]:

    [​IMG]

    Is this correct or the assertion level affects the karnaugh maps?

    thanks.
     
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