Frequency divider by 2 with COMBINATIONAL logic

Discussion in 'Homework Help' started by EngIntoHW, Sep 4, 2010.

  1. EngIntoHW

    Thread Starter Member

    Apr 24, 2010
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    Hey,

    I was asked to design a frequency divider by 2, with COMBINATIONAL logic.

    You have an idea how it could be done?

    I thought of this:
    What do you say?

    (I forgot to mention it in the schematics, the output of the circuit is O0)
    [​IMG]

    Thank you.
     
    Last edited: Sep 4, 2010
  2. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    Are there any restrictions on the logic elements you are allowed to use?
     
  3. EngIntoHW

    Thread Starter Member

    Apr 24, 2010
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    Hi t_n_k,

    no, there're no restrictions.

    I added above a proposed solution.
     
  4. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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  5. EngIntoHW

    Thread Starter Member

    Apr 24, 2010
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    doesn't that circuit in vlsibank double the frequency by 2? (not divides)
     
  6. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    The topic in the link was ...

    "Clock divider without using flip-flops"

    Poster "padala" suggests your method ....
     
  7. EngIntoHW

    Thread Starter Member

    Apr 24, 2010
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    Hi,

    Edit:

    I got you, thanks a lot t_n_k :)
     
    Last edited: Sep 4, 2010
  8. Ghar

    Active Member

    Mar 8, 2010
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    This seems like a silly exercise because as soon as you start adding feedback it technically isn't combinational anymore... the definition of combinational is that it does not depend on any past values.

    A flip flop can be made of just logic gates yet it isn't considered combinational.

    By definition this requires sequential logic... the thread t_n_k found is a much more accurate statement.

    So anyway, that's enough useless nitpicking for now.
     
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