i want to design a 4 location data storage circuit using shift registers
there are 4 address locations with 2 bit addresses(00,01,10,11).
there is a read/write bit.
a reset bit
a 8 bit data input
if the input address bit is 00 and the R/W bit is high, the input data must be stored in the 00 address location. and when the R/W bit is low it must output the data stored in the address location specified.the reset pin when high all data in the 4 address locations must be cleared
there are 4 address locations with 2 bit addresses(00,01,10,11).
there is a read/write bit.
a reset bit
a 8 bit data input
if the input address bit is 00 and the R/W bit is high, the input data must be stored in the 00 address location. and when the R/W bit is low it must output the data stored in the address location specified.the reset pin when high all data in the 4 address locations must be cleared