I'm building a clock that will output a pulse every second edit: it's divided by 30 so produces a short pulse every 30 secs. I've ordered a GPS module that outputs a pulse every second. I want to make a circuit that will output a pulse whose duration is the time between the leading edge of the two pulses. The two pulses will always be fairly close (with a few seconds) but neither one can be assumed to be the earliest one. I've had a stab at designing a circuit to do this and I'm asking if it's likely to work or if there is a better way to do this. Any help much appreciated....Circuit attached :

 

Get a comparator. LM339 is a widely available quad comparator.

Oh wait, are your input pulses very brief? I was thinking of two square wave clocks, and you just need to show when one is high while the other is not.

 

Differentiate each rising edge, and apply them to the Set/Reset inputs of a simple latch (either like a 4013, or one made out of cross-connected Nand or Nor gates). There is a "phase comparator" IC that is frequently used in PLLs that does this intrinsically.

 

I will be able to get a very short pulse from my clock when it is going again. That would be the length of a pulse which resets a counter at a certain count. The duration of the GPS 1 sec pulse is not known but could be processed. My knowledge of logic circuits is very basic so when I looked at the data sheet of the LM339 I was completely lost. If my circuit has a drawback - which will not surprise me - is the LM339 the only other approach ?

 

- is the LM339 the only other approach ?

No, it's not an approach that will work for brief pulses.

Let's talk about WHY you want to compare the peak timing. What use is that information?

 

Differentiate each rising edge, and apply them to the Set/Reset inputs of a simple latch (either like a 4013, or one made out of cross-connected Nand or Nor gates). There is a "phase comparator" IC that is frequently used in PLLs that does this intrinsically.

I've edited a mistake in #1 to show that the although the clocks outputs 1 sec pulses the pulse to be measured is one every 30seconds (he reset pulse I mentioned).
If I stick to the 4013 (which I've just about understood now) it is edge triggered on the clock input so why differentiate ?. I can't quite see how to " apply them to the Set/Reset inputs of a simple latch" without gates (or diodes ??) Also, and I'm not sure if this would apply equally to my circuit not fail for the same reason, if the pulses' leading edge are, say 100mseconds apart would I be sure the difference would not be measured as 900ms rather than 100ms. Only just though of that.

 

Ok..here's what I want to do..My clock ouputs a pulse every 30 seconds (I've corrected my OP) An extremely short counter reset pulse is available or a 300Ms pulse that drives the clock dial. I could use either.
I've ordered a GPS module that ouputs an accurate pulse every second. Don't know how long at the moment.
the clock could be fast or slow. I wouldn't do anything with the "monitor" until the clock rate and phase was reasonable...say within 2 seconds. ( but I'm assumingany of the 1 sec gps pulses would do)
The output pulse will represent the error and I found a simple app for the Arduino (PulseIn I think it's called) that would output the error as a time..I have an Arduino but never used it or know anything about it ! that might be the next learning step...

 

Deleted post.

 

I understand what you're trying to do, and your circuit looks OK as far as it goes. You have a potential problem if the distance between the two positive edges is shorter than the pulse width of the later one. The second pulse (whichever clock source it is) goes high and resets the ff, which removes itself from the reset input with the gating from the Q output going low. But lets say the source of that pulse remains high for 1 second. Half way through that, the first edge comes along and clocks the ff. This returns the Q output to a 1, enabling the second input again before it has had a chance to go low and then high again on its own. The reset input will see a high again and reset the ff.

ak

 

I can now see that I will also need to divide the GPS 1 sec pulses by 30 to make this work sensibly. I can manually reset that counter so that initially that short pulse with 30sec period is a valid reference.
At the moment, a similar clock with no digital output, but which makes a "clunk" every 30 secs is compared by eye and ear to a radio controlled wall clock. I can easily tell whether it is ahead or behind. If a digital monitor could tell me that and more it would be a bonus.
In practice I wouldn't expect the error to be more that a couple of seconds or I wouldn't bother to monitor it with the proposed system. This other clock has been running for a while and the error is less than 2 seconds.
I have attached a timing diagram as I see it. The top pulse is the reference with leading edges exactly 30 ses apart.
The lower one is the clock output which may vary in phase and duration by small amounts on a day to day basis. (by small amounts hopefully)
A consistent error would indicate the clock rate is correct and there is a phase error. By manual fiddling with the pendulum it could be put right.
A slowly changing error would indicate that the pendulum is either running slow or fast and might need adjusting.
An error which varied around a mean would indicate the type of error exhibited by any pendulum clock due to temperature, barometric pressure etc.
So I ordered the GPS module and googled to see how the pulse generated by the difference between the 2 leading edges could be measures, displayed and acted upon.
If I was more into computers I expect there is a way to input the resulting pulse, get a timing and log it. But that's beyond my ability.
However, with some help from a friend who seems to have got some experience of the Arduino, I thought that there might be a solution with that even though I would have to write down the displayed error from time to time..perhaps every hour.
I hope I have made that clear enough. Sorry I was rushed in the earlier posts by "your suppers on the table..come on" etc. hence the mess I made of asking the question
Anologue Kid posted while I ate and composed..Now reading and digesting...

 

I understand what you're trying to do, and your circuit looks OK as far as it goes. You have a potential problem if the distance between the two positive edges is shorter than the pulse width of the later one. The second pulse (whichever clock source it is) goes high and resets the ff, which removes itself from the reset input with the gating from the Q output going low. But lets say the source of that pulse remains high for 1 second. Half way through that, the first edge comes along and clocks the ff. This returns the Q output to a 1, enabling the second input again before it has had a chance to go low and then high again on its own. The reset input will see a high again and reset the ff.

ak

My poor old brain hurts ! But I can see the problem in my circuit. I think it's what you are saying. If one of the input pulses remains high when the ff changes state the reset will be acivated instantly...Ah well ...back to the drawing board..Any other logic circuits that might do this and work ? Incidentally if I set the clock phase so that it was always a few seconds ahead or behind of the ref ( and the pulses are short) it seems to me the problem is simpler. A whole number of seconds in the "answer" could be ignored...
or perhaps I could make both pulses as fast as cmos can handle and perhaps my circuit would then work ? edit: If I processed both pulses by feeding them into 4013's whos Q output went to its own reset would that (a) work and (b) make the pulses about as fast as cmos can handle..The possiblity of them overlaping would then be so small I could ignore it (?)

 

The problem is the difference between "pulses" and "edges", and that the 4013 has an edge-triggered clock but level sensitive and overriding S/R inputs. #3 says to differentiate the inputs. This is a way of guaranteeing the maximum pulse width that the 4013 inputs see, and might solve your timing problem. For example, a 1 second wide input pulse can look like a 1 microsecond wide input after a differentiator, greatly reducing the window of error.

The standard answer from the high-speed logic folks is when in doubt, clock everything. Have each input signal clock its own edge-triggered flipflop, and do the logic gating on the outputs. In this way, a ff can not change state unless its input goes low and high on its own.

ak

 

Would this do it. I could add a little R/C between Q and R to lengthen the output pulses a little if the Reset input wasn't happy. these reshaped (kind of differentiated) pulses would then feed into my original circuit...?

 

You are getting closer. The following circuit is normally used as a phase-frequency detector in phase-locked loops: Output X pulses if freq(A)<freq(B); and vice versa. The pulse duration is proportional to the distance between rising edges of A and B.

 

Below is the simulation of a reasonably simple circuit that I think should do what you want.
It uses RC differentiators to give about a 10μs pulse to trigger the FF to the other state. The RC time-constant can be reduced if you need a shorter pulse.

The duration signal is high for the (shortest) time between the two pulse leading edges.

The delayed feedback from the output to the CLR input insures that the FF Q output is in the zero state before the two pulses arrive. It resets the FF after about 18 seconds of no inputs if Q is high, as can be see at the start of the simulation. This time can also be changed if desired.

Note that power and ground are not shown for the gates and FF and must be added.

Edit: Modified circuit to use Schmitt trigger gates to insure clean pulses for the clock and reset inputs.

 

Thank you MikeML and Crutschow. I will read, digest and do my best to understand, the advice you have taken the trouble to give me. It will have to be tomorrow now....

 

You are getting closer. The following circuit is normally used as a phase-frequency detector in phase-locked loops: Output X pulses if freq(A)<freq(B); and vice versa. The pulse duration is proportional to the distance between rising edges of A and B.

View attachment 85426

To MikeML firstly. New day and fresh mind ! I like that solution a lot. I think I understand it ! one FF is triggered high 0n Q by the first +ve going edge that arrives. Then the second ff also triggers when the later pulse arrives. The wired AND gate output goes high immediately and clears the FFs . The pulses on X or Y are the duration for measurement. I would need to OR gate these to the Arduino input and perhaps use the X and Y to indicate fast / slow in some way?
I do appreciate this help. I haven't been employed at circuit level electronics since 1968 when I finished my training in the valve/tube days. And I've only just returned to hobby electronics since last Christmas when I started on the clock project (11 years after retiring) . It is challenging to say the least...
In #3 you suggested a simple S-R latch. I can see now (after all this thought!) that that too is a perfectly valid solution. If the reference pulse was caused to appear several seconds earlier than the maximum probable error.....say 5 seconds....the error would then always be around 5 seconds +/- the fractional seconds that I'm really interested in.The 5 seconds could presumably be subtracted in the Arduino software before output. Now I will look at crutschows solution....Thanks Mike.

 

Below is the simulation of a reasonably simple circuit that I think should do what you want.
It uses RC differentiators to give about a 10μs pulse to trigger the FF to the other state. The RC time-constant can be reduced if you need a shorter pulse.

The duration signal is high for the (shortest) time between the two pulse leading edges.

The delayed feedback from the output to the CLR input insures that the FF Q output is in the zero state before the two pulses arrive. It resets the FF after about 18 seconds of no inputs if Q is high, as can be see at the start of the simulation. This time can also be changed if desired.

Note that power and ground are not shown for the gates and FF and must be added.

Edit: Modified circuit to use Schmitt trigger gates to insure clean pulses for the clock and reset inputs.

View attachment 85448

Ok...I get that solution as well..another approach but also really neat. You've processed the pulses to get the 10us inputs. The 4013 is wired as a /2 and gets clocked up and down with each pair of pulses. The long duration of the CLR pulse creates immunity to false triggering if there happened to be glitches on the input lines between the 30 second pulse pairs ?
during the next two weeks I hope to have the clock assembled and going. I also hope to take delivery of a Rigol DS1054z scope as well as the GPS module. So I will breadboard the suggested circuits and play
BTW...I talk about the Arduino as though I know what I'm doing ! I don't...It arrived recently and I've only looked at it. Googling for pulse measurement came up with the PulsIn code which seems to be what I want so there is much more brain stretching up ahead still to do.
Thank you crutschow for taking the trouble like MikeML to draw out these circuits. My circuit will be ditched but it was educational trying to work out a solution from scratch..
+++++++AAC

 

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The long duration of the CLR pulse creates immunity to false triggering if there happened to be glitches on the input lines between the 30 second pulse pairs ?
.....................

The actual clear pulse is short. That pulse is to reset the FF if it gets out of sync (output high more that about 18s) so that it measures the short duration between pulses, not the long duration.
Thus if a glitch occurs that incorrectly sets the FF then it will be reset to the proper sequence within one or two cycles.

Actually, with a little programming you should be able to use the Arduino to measure the pulse times with little or no additional circuitry. You just measure the time between the two pulses going high for both sequence orders (A to B and B to A). (You don't have to shorten the pulses to do this). This will give you a long time and a short time. You then compare the two times and select the short time, which is the period of interest.
That should be a reasonably task for your first programming effort.
Someone on this forum or the Programmers Corner forum should be able help you with that if you get stuck.
(Unfortunately not me since I find the C language too arcane. All I know is a little Basic so the Picaxe or Stamp micros are more my speed.)

 

Yes I misunderstood the point of the reset pulse but got it now.
And re the Arduino programming...Initially I'll build it using the single pulse input but if I find the way to input the pulses separately into two ports then I can always change..who knows where the Arduino will take me ..