Discussion in 'The Projects Forum' started by kevin.khan, Jul 10, 2012.

  1. kevin.khan

    Thread Starter New Member

    Jul 9, 2012
    Hi all,

    I'm kind of a noob when it comes to using FIFOs so please bare with me. I have deemed that I need a FIFO between my microcontroller and the rest of my data acquisition system as the data comes in much faster than I can process it. So I guess first question then is... FIFOs are used for this kind of scenario, correct?

    My next question then has to do with the properties outlined when looking for a FIFO. I'm currently browsing through Cypress' collection, and I was just curious what is meant by the terms "density" and "organization".

    And finally, this may be more of a general question, but when the FIFO is read, is that data subsequently removed? Thanks for the help.

  2. crutschow


    Mar 14, 2008
    Yes. A FIFO acts as a variable delay line to allow the storage of data when it temporarily comes in faster then it can be processed. Once you read the data it is removed. The size of the FIFO must be large enough to store all the data coming in until you can process it. Note that obviously you can't indefinitely take data in faster than you can read it out or the FIFO will become full and overflow (loss of data).
  3. Papabravo


    Feb 24, 2006
    Some FIFO IC's can be loaded, read, reset and read again. I've used this feature of the FIFO in numerous communication test sets to construct packets that are pumped out repeatedly.
  4. MrChips


    Oct 2, 2009
    Once again, the devil is in the details.
    You have to say fully what you are doing.

    A FIFO will not help you if you cannot process the data faster than it is arriving. Eventually the FIFO will fill up and you will lose data.

    A FIFO is more useful when the data is arriving at random times but the overall average rate is still low enough so that eventually you can catch up with the incoming data.

    FIFOs can be implemented using the processor's on-chip memory or it can be implemented in an FPGA as a front end to the processor.
  5. t06afre

    AAC Fanatic!

    May 11, 2009
    I use a lot dataacquisition cards then programming in Labview. And every of those cards do have a FIFO. In this case the FIFO is filled up with samples at a regular interval. And the PC read samples from the FIFO in bulks. Windows is not a realtime OS. So the FIFO allow for some irregularity in the reading intervals. However if the PC is not able to read data faster than the data pile up inside the FIFO. Data will at some point be lost