# Experimental design for small sig. amp

Discussion in 'General Electronics Chat' started by hobbyist, Jul 19, 2009.

1. ### hobbyist Thread Starter Distinguished Member

Aug 10, 2008
764
56
Hi,

This thread is for people to look at and suggest design corrections, for beginners to learn from.

This can be scrutinized by people more knowledgeable to give good design suggestions so everyone starting
out in this field can benefit from the learning in this thread.

VCC = 12V.
Freq. = 400 Hz.
Vin pk. = 10mV.
VinZout = 700 ohms.
Vout pk. = 4V.
-----------------------
I will approach this design by designing CC amp. for the output to drive the load.

Stage Q1:
Vin pk. = 4V.
Re1 = 200 ohms to match Rload.
C1 = 100uF

These next steps are done experimentally because of the low VCC with respect to Vin.
Now since Vin is very high with respect to the VCC I will make RB1 around 100 > RE1

RB1 = 22K
Now hooking my generator to the input of this CC. amp. and scoping the input and output,
I use my res.sub.box. to test resistors between base and VCC, until I get a proper waveform
close to 4V pk. across a 200 ohm load. (that value is RB2)

RB2 = 3.9K

Dynamic test:
A good waveform across Rload, the amp can only take around 4V. input before it distorts
so because of the low VCC with respect to the output swing needed, the output across the Rload
is a little more than 3.8V pk. close to design values, shoiuld I realy need a 4V. out, than
I would have to use different transistors (fet, power trans, ect..). But this is just a experimental
design.
To see how stable the stage was, due to base current loading on the divider, I did the 5 transistor
substitute on this stage and the Vb, VE, and waveform amplitude and structure remained close to same,
values throughout. No significant change in the output wave.

It passed the base current loading affect test, so this stage is somewhat stable in variations of IB.

Calculate Zin estimated around 1.2K - 2.4K using Beta from (20 - 100)
Now I have a output voltage across the Load as reqired.

The Zin is still too low for me to multistage CE amps into it yet.

So I will keep the scope at the output of this stage and design another CC. amp to cap. feed into it
using a RE2 value of 1K.

---------------------------

Stage Q2:
RE2 = 1K
RB3 = 33K
RB4 = 22K

Dynamic test:

Well when I hooked up the input signal I had to lower it's amplitude now the output signal has excellent
waveshape and the amplitude is right at 4V. pk. Even when I disconnect and connect the 200 ohm LOAD
there is hardly any noticeable change in both the amplitude and shape of waveform. Very good.

Zin is now around (6k - 10k) OHMS.
I think I have enough impedance to develope a 4V. pk signal across with a CE amp stage.

-------------------------------
Stage Q3:

RC3 = 4.7K
VCQ3 = 6V.
ICQ3 = 1.27mA.
RE3 = 220
VRE3 = 279mV.
VRB5 = 0.98V.
RB5 = 8.2K
IRB5 = 119uA.
RB6 = 91K

static test:

VC = 5.7V.
VRB5 = 1V.

dynamic test:

Waveform shows good amplitude close to 4.5V. pk. input signal needed lowered, for that stage.
Now OVERALL performance to this point, scoping Vout. at the RLOAD and scoping Vin aqt stage Q3,
shows excellent waveform and amplitude rides comfortably at a peek of 4V. across the 200 ohm load.

Disconnecting the load gives No real significant change in the Vout, of amp, and Vin is at 300mV.

I changed the transistors in all 3 stages 3 times and got the ame output waveform.
Good amplifying so far.

So 3 stages Av. is around (4V / 300mV) = 13.3
Zin = (2.7K - 5.6K) Beta (20 -100)

------------------------
Stage Q4:

RC4 = 2K
VCQ4 = 6V
ICQ4 = 3mA.
RE4 = 100
VRE4 = 300mV.
VRB7 = 1V.
RB7 = 6.8K
IRB7 = 147uA
RB8 = 75K

static test:
VC = 7V
VRB7 = 0.97V

Dynamic test:
Good signal waveform and amplitude:

COMPLETED AND WORKS GOOD.
----------------------------------------------
OVERALL PERFORMANCE
Vin = 8mV
Vout = 4V
When I connect or disconnect the LOAD there is NO apparent change in Vout amplitude nor waveform shape.
Av. = 500

When I got to the last stage and connected it to the rest of the amp, I got a lot of rf noise on the scope
I put in a 0.1 uf cap from the base of Q3 to ground to filter the noise and got a nice strong waveform,
however I was getting 4 Volt. out with 20mV. input, so I placed the AC bypass across emitter res.RE4 to bring
a nice 4V. output with a 8mV. input. So I was able to recover the gain needed to put 4.Vout @ 10.mVin.

No feedback capacitors were used, therefore a very slight phase shift from input to output.

Changed every transistor with different ones, couple times and get the same output waveform.

I designed it with my generator set at 400Hz.
So this amp is more like a narrow bandpass amplifier it only amplifies at peek voltage from 400 to around 900 Hz.
It amplifies about a 500 HZ bandwith very narrow.

This is a experiment in trying to design using a logical approach of attempting to amplify a small signal
from a impedance mismatch between input and output from a high impedance 700 ohms to a low 200 ohms output.

With a Vcc that is just large enough to handle the signal voltage of 4V. peek.

Also using NPN 2n3904 transistors throughout the design.

Vout at RLOAD is 4V. pk.

Last edited: Jul 19, 2009
2. ### millwood Guest

here is a suggestion. since it's an emitter follower, you get the most swing if the output (the emitter) sits at 1/2 Vcc, or if you count in the saturation Vce(sat), it is slightly lower but let's go with 1/2Vcc = 6v. that means your base is at 6.7v.

from if you want the stage to idle at 10 - 15ma (typical for a preamp). Re=6v/10ma=600ohm.

I would run the bias at about 2ma - 5ma so Rb1+Rb2=12v/2ma=6k. that means Rb2=6.7/12*6k=3.3k, and Rb1=2.7k.

then you can work out the rest.

3. ### ELECTRONERD Senior Member

May 26, 2009
1,146
16
THANK YOU HOBBYIST! Your work is greatly appreciated! I've really wanted to understand transistors better and your efforts have made that possible.

4. ### Wendy Moderator

Mar 24, 2008
20,735
2,499
C6 is a killer, it roll off the high frequencies like crazy, which I suspect you know.

I don't understand why you would put two emitter followers one after the other. Common collector circuits don't have voltage gain, they are generally used for impedance matching, and one is enough for that application.

I agree with millwoods comments for the most part.

My personal approach to designing is to start with as many parameters as I can think of, such as input impedance, output impedance, upper/lower frequency responce, and gain, then work from there.

Everyone has personal preferences to their designs, sometimes it works and sometimes it doesn't. With low frequencies, such as 400Hz, a lot of negligable factors really are, but you try to use them at RF frequencies, say 10Mhz, and they're major. All part of the process.

5. ### millwood Guest

I didn't realize that you had a load of 200ohm on the follower. in that case, you want the Re to be at most equal to 200ohm, and i would run it at 110ohm to be safe.

Once you do that, you are idling at 6v/110ohm = 60ma - you will need a beefy to220 on a good heatsink with that.

and your base current will also be substantial - 1ma - 2ma I would guess. that means your divider network will idle at 5 - 10ma.

this is beyond the limit of a typical single stage SE amplifier. you should think about class AB, or a two stage design, or active loading.

6. ### millwood Guest

here is a preamp that will have substantially better performance than yours and it is simple to analyze as well.

there really is no need for multi-stage, ac coupled amps.

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7. ### hobbyist Thread Starter Distinguished Member

Aug 10, 2008
764
56
Thanks guys for the suggestions,

I originally biased the CC for 6V. across the emitter, and worked the base bias for that, but as I applied the signal at 4V. I was getting flats on the neg. peeks. As I raised VCC I got rid of the flats and had substantial Vout.

So I put the supply back to 12V. and began to rework the base bias to ground experimentally until the neg. peeks were gone and had a good symetrical waveform, that made me think that the Vin, is to large for the VCC being used, so I designed the CC, using the base bias that gave the proper waveform.

The reason I used 2 CC amps, was I had only around 1.2K Zin at the first CC, and I wanted to get a larger impedance to work into before I used the CE amps. Both CC, amps are just for impedance matching the CE. stage to the low 200 ohm load.

Also the disc capacitor is used as a filter for the rf noise I was getting at that point, I had no other choice, I put a feedback resistor in the CE stage and that got rid of the noise, but the Vout was around 2V, pk. instead of the 4V. I was looking for.

Millwood
Since this is a thread put out there for learning, can you go into some good detail of how you designed your preamp, how you came up with your values, and the configuration, and feedback and all that stuff so we can learn more on this subject.

Thanks again guys.

8. ### millwood Guest

just wanted to add that the schematic I posted above represents a very well designed amp (not my work). the dc and ac performance is independent of the transistors used and entirely determined by the resistors.

its ac performance is even more impressive: graceful and symmetrical clipping when over driven, something you rarely see in modern high gain / high feedback designs.

Aug 10, 2008
764
56

10. ### millwood Guest

signal conditioning is typically done at the input stage, with a serial resistor (1k typically) alone or in combination with a small capacitor to ground (<110pf). the serial resistor is usually very effective because transistor's input impedance is literally zero at rf frequencies.

11. ### hobbyist Thread Starter Distinguished Member

Aug 10, 2008
764
56
I'll keep that in my notes:

Also when I tried to bias the CC amps. for 1/2VCC at the output, I was getting the flat overdriven neg. peeks, is that because of not enough supply voltage for the Vout swing, or because the VCC was to low for the Vin.

So by testing resistor values at the base I was able to watch the waveform get to proper shape and amplitude, that was a result of lowering the res. to VCC allowing the transistor to come out of cutoff, so probably the Vin was too high for the available VCC to allow me to properly bias the CC. @ 1/2VCC.

Any suggestions.
Thanks.

12. ### millwood Guest

I am not sure what "flat overdriven neg. peeks" are. but I am supposing you are talking about Q3 in your circuit?

to set it to 1/2Vcc at Q3's collector, you will need to idle it 6v/4.7k=1.2ma, which is about right.

with your gain, Q3's emitter is at 1.2ma*200~=0v. so Q3's base is at 0.7v. That means Rb5/(rb5+rb6)*12=0.7v. or Rb5=0.7v/12v*100k=5.8k: I am assuming that rb5+rb6=100k for ease of calculation.

in your bias, Q3's base is at 8.2k/(8.2k+91k)*12v=1v. that means Q3's emitter sits at 1v-0.7v=0.3v. and the idle current for Q3 is 0.3v/200=1.5ma, and Q3's collector sits at 24-1.5ma*22k=-12v, or 0v.

so basically Q3 is saturated, because the bias (Vb) is too high. you can either lower the bias (by reducing Rb5), or lower the gain (lower rc3 or higher re3). again, going through the same math.

13. ### The Electrician AAC Fanatic!

Oct 9, 2007
2,255
311
A 2N3904 (or similar) transistor's input impedance is not "literally" zero at rf frequencies.

See: www.fairchildsemi.com/ds/MM/MMBTH10.pdf

Have a look on page 5, under the page heading "Common Emitter Y Parameters vs. Frequency", look at the graph titled "Input Admittance". The input impedance (1/admittance) is not zero for any frequency.

This behavior is quite typical even for 2N3904 transistors whose Ft is not as high as 650 MHz; the input impedance doesn't become "literally" zero at rf frequencies.

14. ### hobbyist Thread Starter Distinguished Member

Aug 10, 2008
764
56
I tried to bias Q1 emitter for 6V. then when I applied the Vin. around 4V. I seen on the scope I was getting flat neg peeks, I realized I was driving the stage into cutoff, while the pos. peeks remained at around 3.8V, with a nice duplication of the input signal pos.side, so I began to raise the value of RB1 until I had symetrical output at around 3.8V. pk. with no distortion.

My guess is because the VCC supply is too low for the Vout pk.pk.
Any suggestions.

I'm not following you on this, could you explain better.
I think I see what your saying it's because of the gain that drives it to 0 violts?
i'll have to look into that.

thanks.

Last edited: Jul 19, 2009
15. ### millwood Guest

I am not sure what "flat neg peeks" are. if they are peaks, how can they be flat? you mean clipping on the negative side?

running into clipping on the negative cycle is usually due to lean idle: idle current being too small.

when you applied Vin around 4v, is it DC or ac? meaning is it applied to Q1 via a capacitor or directly on the bias network?

16. ### hobbyist Thread Starter Distinguished Member

Aug 10, 2008
764
56
clipping on the neg side.

Ac sig. thru 100uf cap. directly to base of Q1 stage, before I added the rest of the stages.
first schem.
thanks

17. ### millwood Guest

it clips because you are running out of idle current. in theory, a class A SE amp (yours is) needs to idle at its maximum output current, at least. 4v on 200ohm =50ma. so you will need to idle at 50ma. that means your Re resistor needs to be 6v/50ma=120ohm.

you have to lower the Re resistor - Re1 in your schematic. I usually make sure it is no more than 50% of that of the load. so in this case, make it 110ohm.

you likely will need to run it richer (higher) and remember to adjust bias to raise Ve as well.

btw, calculate the wattage on that resistor - it can get hot.

18. ### millwood Guest

my math seems to be lousy today,

to output 4vp on 200ohm, you need to source or sink 4v/200ohm=20ma.

idling at 6v on 200ohm Re -> 6v/200ohm=30ma.

so your cushion of just 10ma may not be enough, and your transistor may be cut off at the very bottom of the cycle.

try Re1=110ohm and it will help.

19. ### hobbyist Thread Starter Distinguished Member

Aug 10, 2008
764
56
Thankyou I didn't realize you needed to use the pk. sig. volt for that calc.

So when biasing a CC amp. I need toi take the Vin pk. across the load res. and use that current value to divide into the 1/2VCC bias on the emitter to establish the value max. for the emitter biasing, to avoid the clipping due to the amp not in the center of the load line.
Ok I understand better now.
Thanks..

20. ### millwood Guest

the peak voltage is used because the Re resistor is essentially your current source / sink in a emitter follower set-up.

so you will need to make sure that you have sufficient idle current to drive the load from peak to trough.

that's why sometimes people use a real constant current source, or an inductor, in place of that Re resistor.