Even Parity Digital

Discussion in 'The Projects Forum' started by cariba, May 14, 2009.

  1. cariba

    Thread Starter Member

    Apr 22, 2009
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    0
    Hi All, Ive been assigned to set up a mealy machine using d type flip flops , which is able to scan even 1 bits from a set of 4 bits.

    For example , for the 1st set of 4 bits being 1101 it should output a 0 since the number of 1s is odd, whilst for the following combination 0011 it should output a 1 , the clock is to be applied by a signal generator and the inputs using a hi low selector switch.

    Any ideas how I can set up the ciruict please??


    Thanks
    Alistair
     
  2. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
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    Start with a truth table. Must you use flip flops to generate the parity?
     
  3. cariba

    Thread Starter Member

    Apr 22, 2009
    19
    0
    yes, i need to use D Flip Flop. That is the problem, i cannot figure out how to do the state and truth table...
     
  4. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
    282
    The table lists all 16 states of the bits - 0000 to 1111, and follows each with the correct parity.

    Double check about the flip flops. They are fine for holding the value for the parity to be generated, but not very good about generating the parity. How are they supposed to get clocked, for instance?
     
  5. cariba

    Thread Starter Member

    Apr 22, 2009
    19
    0
    so your recommend other types of flip flops? they will be clocked manualy using a schmitt trigger, preset by an input being a high or low before each clock pulse
     
  6. beenthere

    Retired Moderator

    Apr 20, 2004
    15,815
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    Take a look at a 74LS280 parity generator to see how the internal logic works.
     
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