Emitter resistor

Discussion in 'Homework Help' started by alphacat, Apr 2, 2010.

  1. alphacat

    Thread Starter Active Member

    Jun 6, 2009
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    Hi guys.

    In a CE amplifier, with the below configuration, how does the emitter resistor effect the output voltage swing range?

    [​IMG]
     
  2. PRS

    Well-Known Member

    Aug 24, 2008
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    The allowable swing is between Vcc and Ve with Vc being the axis of symmetry through which the signal voltage swings. It's like a window. You set the size of this window by Vcc, and your choice of Vc and Ve.

    For a given design the maximum swing will be either 2*Vce or 2*IcRc whichever is smaller.
     
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  3. Jony130

    AAC Fanatic!

    Feb 17, 2009
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    You get max output voltage swing if you pick Ic equal

    Ic_{opt}=\frac{Vcc-Vce(sat)}{2(Rc+Re)}

    what gives Vce≈0.5*Vcc
     
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  4. alphacat

    Thread Starter Active Member

    Jun 6, 2009
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    Hi.
    Thank you both!

    What makes it hard for me to understand it is that VBE must stay equal to ~0.65V to be turned on.
    so if IC changes, VE (emitter voltage) changes as well, but since VB remains constant, then VBE might go below 0.65V and get the BJT into cut-off or go higher than 0.65V and burn the BE diode.
     
  5. jlcstrat

    Active Member

    Jun 19, 2009
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    VE remains constant and relative to VB. VRe changes with IC
     
  6. alphacat

    Thread Starter Active Member

    Jun 6, 2009
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    Could you explain please?

    How come VE remains constant?
    If IC changes, then VE (=IC*RE) changes accordingly.
     
  7. hobbyist

    Distinguished Member

    Aug 10, 2008
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    Remember IC can only change with respect to a change in IB, which is goverened by VB.

    Note: as long as IC is temperature stable, which is the reason for using RE.
     
  8. jlcstrat

    Active Member

    Jun 19, 2009
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    I'm a student myself, but I believe VE=VB-.6 VRE=IC*RE . The voltage on the emitter resistor doesn't affect the bias of the base to emitter junction in a CE amplifier.
     
  9. The Electrician

    AAC Fanatic!

    Oct 9, 2007
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    Jony130, do you remember (can you provide a link) to an earlier post about biasing where you provided the expression for the case where part of the emitter resistance is bypassed with a capacitor?
     
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  10. alphacat

    Thread Starter Active Member

    Jun 6, 2009
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    Hi guys,
    Thanks a lot, i got it now.

    Is it correct to say that:
    VOUT(min) = VEE + IC*RE + VCE(SAT)
    VOUT(max) = VCC
    ?
    So to get maximal output voltage swing, i'd want to set VOUT at half way between VOUT(min) and VOUT(max).
     
  11. Jony130

    AAC Fanatic!

    Feb 17, 2009
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    The minimum voltage occurs when BJt is start to saturation.
    And the max. when is start to cut-off

    [​IMG]
    Vcc = 12V; Vc = 6V (red plot ); Ve = 2V (green plot) ; Vin = 1pV (blue plot).

    Yes,
    http://forum.allaboutcircuits.com/showthread.php?t=25586&highlight=swing&page=18 (post 174, 176 )
     
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  12. hobbyist

    Distinguished Member

    Aug 10, 2008
    764
    56

    In theory YES.

    But the transistor would have to be at total cutoff to get maximum Vout at VCC.

    But your then running out of the lineararity of the transistor, in the cutoff and saturation reagions, it is best to know your Vout swing, and provide a VCC thast is about 20% greater to acomodate the needed Vout.
     
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