Elctronics

Discussion in 'General Electronics Chat' started by dar2525, Jun 24, 2005.

  1. dar2525

    Thread Starter Member

    Jun 17, 2005
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    [attachmentid=745]I have been trying to understand this circuit, but i do not know how rectification occurs at the output or R1. C1 is capable of voltages up to 63V and C2 is capable of voltages up tp 50V. I used Circuit Maker and actual sine wave to look at signals at different nodes. Somewhere in the circuit AC is switched to DC. I just do not know where. I know C2 performs the full wave rectifcation, but where is the half wave rectification. Also, I think D1 is to prevent signal loss, but I am not sure. Please help me understand why R3, R2 and C1 is needed at the gate of the SCR. Once the gate is triggered the SCR will conduct, correct. Please help
     
  2. pebe

    AAC Fanatic!

    Oct 11, 2004
    628
    3
    The circuit seems a bit obscure. Can you say if it's an established design and what it's supposed to do?
     
  3. ahsan

    New Member

    Jun 26, 2005
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    Well I understand whats your problem is...Look R3 R2 C1 are used to provide triggering pulses to the gate of an SCR WHICH CONDUCTS UNDER 2 CONDITIONS
    1)Its anode voltage is greater than the athode voltage
    2)Its gate is being triggered
    During +ve cycle SCR is made to conduct and at the output FILTER CAPACITOR IS THERE TO REJECT SOME RIPPLES.It is charged during the same cycle.
    During -ve cycle Diode provides a conducting path to the signal source but no current flows from the source to the output . SO NOW WE HAVE A SIGNAL WHICH HAS SAME POLARITY i.e +ve AND NO -VE PORTION THIS IS WHERE AC CONVERTS TO DC. So now it is a Capacitor which discharges and thus providing output currnet .
    Please note that components u mentioned should have high ratings since they are to endure high voltages and currents.The output RC filter is used as RIPPLE REJECTION
     
  4. pebe

    AAC Fanatic!

    Oct 11, 2004
    628
    3
    How can you put a diode - forward biassed - across 60vpp signal without destroying it?
    I thought C2 was the smoothing capacitor and R1 was the load!

    The bit I cannot understand is the triggering action of R2, R3, C1. It doesn't appear to be a delaying circuit.
     
  5. dar2525

    Thread Starter Member

    Jun 17, 2005
    21
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    Thank you for replying. Here is the actual circuit I am tryting to anaylze. R7 is the load. The three sources are representing a 3 phase generator. Each source is a 120 degrees phase difference. I understand that C4 decreases the ripple for the DC output. I know the zenor is used to prevent overvoltage at the SCR gate. I am think is the diodes are used to remove the negative portion of the sinewave from each phase source. Please respond
     
  6. dar2525

    Thread Starter Member

    Jun 17, 2005
    21
    0
    Thank you for replying. Here is the actual circuit I am tryting to anaylze. R7 is the load. The three sources are representing a 3 phase generator. Each source is a 120 degrees phase difference. I understand that C4 decreases the ripple for the DC output. I know the zenor is used to prevent overvoltage at the SCR gate. I am think is the diodes are used to remove the negative portion of the sinewave from each phase source. But I do not understand when you metion "During -ve cycle Diode provides a conducting path to the signal source but no current flows from the source to the output ." Can you explain a little more. So far, your post has helped me understand much of the circuit I first posted.
     
  7. dar2525

    Thread Starter Member

    Jun 17, 2005
    21
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    Here is how the actual circuit looks.
    Thanks for responding
     
  8. ahsan

    New Member

    Jun 26, 2005
    5
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    Well yes I've reasoning to do for that.
    It is rather rubbish to put a diode in that manner but what designer wants is to have a very large Power loss in it and still hopes it works well.Quite Insane....
    See atatched files.
    Also note that at the the gate circuit of an SCR must be supposed to produce pulses or spikes which it is not doing UNFORTUNATELY....
    Hence output voltage is very small do to non-conduction phenomena but is always unidirectional.Moreover outpout capacitor is for RIPPLE Rejection.
     
  9. pebe

    AAC Fanatic!

    Oct 11, 2004
    628
    3
    I’ll have a go at explaining the operation.

    You have 3 phases wired in ‘Star’ and their common junction is the ground (0V). Originally, you showed a load of 64ohms – you have now revised it to 1Kohm. Nevertheless, I assume the source impedance is quite low. I assume that as in normal 3phase supplies, the phases are at 120degrees to each other.

    The anodes of the three diodes are connected to 0V. First, the three diodes will have a forward voltage drop of less than 1V, so when, in turn, the poles of the phases connected to their cathodes goes to 30Vnegative, then the diodes will surely pop! They would be far better used in series with the SCR anodes to prevent the SCRs anodes being reverse biased. The following assumes they are fitted that way.

    You have all gates wired together and fed from identical networks wired in ‘star’ from the phases. So with no SCR conducting, the gates will be at 0V.

    We need a reference point in time. Let us assume that to be ‘T’ when the voltage on the Phase1 waveform is at its +ve peak, ie. +30V. (Let’s shorten ‘Phase’ to ‘Ph’). At T-90deg, Ph1 will start going positive. This is the fastest rise time during the cycle and C1/R3 are probably chosen to kick the gate positive and at some point the RC network will turn on SCR1 (R2 is there to maintain DC continuity because of the capacitor). All gates will now follow its cathode volts. C4 will charge to (almost) +30V as Ph1 goes through time T.

    As time progresses, probably around about T+10deg, SCR1 anode will fall below its cathode potential and the SCR will cut off. The gates return to 0v and C4 starts discharging through R7. That status will remain until approx time =T+110deg. At that point Ph2 will be 10deg before its maximum. Soon after that, Ph2 volts will exceed the voltage across C4, and SCR2 will conduct. Gates will now follow SCR2 cathode – with a similar voltage as before. At T+130deg, SCR2 will cut off in the same way that SCR1 did. The same process will repeat and at T+230deg, SCR3 will conduct for about 20deg of its cycle.

    To sum up:
    1. The 3 diodes are in the wrong positions.
    2. Each SCR will conduct for a period between 10deg before and 10deg after the voltage peak of its phase, approximately.
    3. The gates will pulse from 0V to around +30v when any SCR conducts.
    4. I can see no purpose for the 30V zener, D4. The gates never go above +30V so as far as I can see it’s doing nothing.
    5. I don't know why SCRs were used anyway. Rectifiers would have been just as effective!

    I hope that may help.
     
  10. dar2525

    Thread Starter Member

    Jun 17, 2005
    21
    0
    Thanks for replying. So during the negative cycle the SCR does not conduct, so where does current go? Because it can not go through the reverse biased diode, correct.
     
  11. dar2525

    Thread Starter Member

    Jun 17, 2005
    21
    0
    Thanks for replying. Can you reattach the file? It does not open when excecuted.
     
  12. dar2525

    Thread Starter Member

    Jun 17, 2005
    21
    0

    I do understand what you mean by "T-90degrees. Are you talking about the argument of the phase voltage, Vsin(wt-90degrees)? How is R2 maintaing DC coninuity? I am thinking R2 is there to prevent too much gate current or voltge.

    Why are 3 diode in the wrong position? I agree about the misuse of the SCR, diode would have worked, but this is circuit is built that I have and I am not seeing the complete ripple at the output.

    Thanks for replying.
     
  13. pebe

    AAC Fanatic!

    Oct 11, 2004
    628
    3
    Do you mean you 'don't' understand? If so, then I'll try again. Consider a sinewave waveform. For simplicity I defined ‘T’ as a point in time when the voltage on the Phase1 waveform is at its +ve peak. T-90degrees is the time corresponding to 90degrees before T on the waveform, ie. the voltage is zero but on the positive-going part of the cycle.
    Without R2 the gate would be open circuit because the capacitor is an open circuit to DC.
    If that circuit is built and working then you have drawn it wrongly. The 3 diodes are shown in parallel with AC voltage generators. They will be damaged the moment you switch on!
     
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