# Effects of restricting most significant bits in result

Discussion in 'Homework Help' started by elmaggan, Jul 16, 2015.

1. ### elmaggan Thread Starter New Member

Jul 15, 2015
5
0
So i have calculated the settling time for the capacitor C in an RC circuit. The RC circuit is the result of connecting an ADC with a mutiplexer. The ADC is a 12-bit type.

In the assignment information was given in order to fulfill the equation Vc=Vin(1-e^-t/RC) in order to find the time t (t=1164.487 ns).

Now the time is still the parameter that is to be calculated but only 6 of the most significant bits of the result should be taking into account. So i was wondering, what is the effect of just looking at the 6 most significant bits of the result? What factors changed going in to calculating the settling time of the capacitor once more?

Thanks!

2. ### WBahn Moderator

Mar 31, 2012
17,777
4,805
And we are supposed to divine the circuit you are using based on this????

How about posting a schematic?

3. ### elmaggan Thread Starter New Member

Jul 15, 2015
5
0
Yes sure, ill load the image. Also Vref=3.3 V, LSB=805.664*10^-6 V and i know that 1/4 LSB is desired. Also R=Rmux+R=3kohm+7kohm and C=12pF. That is how i reached t with some algebra and put in some values above.

File size:
30.5 KB
Views:
9