Hi,

I am wondering if anybody has more information about the effect of an output capacitor on a circuit? I.e. Does an output capacitor with (parallel) resistive load contribute any poles or zeroes, and how can i determine the location of said poles and zeroes?

I assume there is probably some relationship similar to an RC filter where ω=1/RC, but in my case, I do not have a series resistor. Furthermore, is there any contribution by the ESR of the capacitor itself?

If someone can answer these questions or has some references that i can refer to, that would be greatly appreciated.

Thanks.

 

Hi,

I am wondering if anybody has more information about the effect of an output capacitor on a circuit? I.e. Does an output capacitor with (parallel) resistive load contribute any poles or zeroes, and how can i determine the location of said poles and zeroes?

Depends on the driving impedance. For a typical LDO regulator (which has a higher output impedance) the output cap and load resistor form a pole. For a standard NPN reg which has a low output impedance, the output cap doesn't form a pole at a low enough frequency to hurt anything.

I assume there is probably some relationship similar to an RC filter where ω=1/RC, but in my case, I do not have a series resistor. Furthermore, is there any contribution by the ESR of the capacitor itself?

Depends. On an LDO, the ESR forms a zero in the loop gain.

 

Hi,

I'm not sure if this is a "proper" question or not, but what is considered "high" output impedance vs "low?"

Does the above apply only for LDO's? I read a little on LDO's and it looks like you need a difference amplifier. Does that mean for open loop systems (no feedback loop), that the above is not applicable?

Thanks.