Google: Electronic Control for DC Motors Using Discrete Bridge Circuits ;& check Fig 23.5.Darlington H- Bridge [5 V].& pg.239, I substitued... Also packaged IC H-br like L298N or BA6885FS. As I said before, H- only needs to be powered up for about one sec for each pulse. 4 AA Ni-Cd's should work, but would still like to know more about solenoid, and cap-discharge. A solar panel 15X 15 cm gives 11V OC, 150 mA SC, peak pwr-826 mW- measured 5-24-09, 10 AM, Tucson AZ.

 

Google: Electronic Control for DC Motors Using Discrete Bridge Circuits ;& check Fig 23.5.Darlington H- Bridge [5 V].& pg.239, I substitued... Also packaged IC H-br like L298N or BA6885FS. As I said before, H- only needs to be powered up for about one sec for each pulse. 4 AA Ni-Cd's should work, but would still like to know more about solenoid, and cap-discharge. A solar panel 15X 15 cm gives 11V OC, 150 mA SC, peak pwr-826 mW- measured 5-24-09, 10 AM, Tucson AZ.

Hi Bernard, thanks for the info. I checked out the H-bridge circuits. I was wondering if it's possible to do an h-bridge using a Vsource of around 3.6? I found some logic level P channel mosfets, do you think they would work? The Gate Threshold Voltage for those logic level mosfet is min -0.4 and max -1.0 V

http://media.digikey.com/pdf/Data Sheets/Fairchild PDFs/FDB4020P,FDP4020P.pdf

This is the link for the solenoid

http://www.ledex.com/pdf/MagLatch_B22-L.pdf

 

Sorry for delay, my schedule is really screwed up, but did look at your P-ch FET's, should work, but then I've never made or used an H-br. The Ledex reff. doesn't seem to cover your solenoid,Have you tried 1.5V for pull in & drop out? & what minimum pulse width does it take ?

 

While sitting in ER , sketched out H-br-logic power control so that when the sun comes out and solar panel, SP,V rises to 2/3 battery V, power is supplied to logic,+L,& H-br. Schmitt triggers are supplied from the battery, drawing only a few μAs. After turn on reset,F, flip-flop,G,holds +L power on for 10 hours when reset by counter H. Note use of schmitt negative NAND gates as NOR's. Amount of turn on and FF delay determined by size of filter caps. If none of this makes sense, blame it on brain fog, cause my wife did'nt make it.