DLD, question to be solved

Discussion in 'Homework Help' started by Scorpion311, Oct 7, 2016.

  1. Scorpion311

    Thread Starter New Member

    Oct 7, 2016
    3
    0
    I m new to Digital Logic design subject. Can you guys help me solve this problem. i will upload the steps i have performed with this post. Untitled.png
     
  2. Bernard

    AAC Fanatic!

    Aug 7, 2008
    4,170
    395
    Is this home work ? Please show your steps taken.
     
  3. WBahn

    Moderator

    Mar 31, 2012
    17,715
    4,787
    As noted already, you need to provide your work so far.

    Under what conditions would Y ever sound? Are you sure you have all of the specifications shown?
     
  4. Scorpion311

    Thread Starter New Member

    Oct 7, 2016
    3
    0
    here it is. I m confused for the last part.
    can you guys go thru the work i have done, is it correct?
     
  5. Scorpion311

    Thread Starter New Member

    Oct 7, 2016
    3
    0
    here it is @Bernard and @WBahn
    I m confused for the last part.
    can you guys go thru the work i have done, is it correct?
    nard Untitled 2\'.png
     
  6. WBahn

    Moderator

    Mar 31, 2012
    17,715
    4,787
    Ask yourself if your solution makes sense.

    Your diagram shows that X and Y are ALWAYS the same.

    Do ANY of the specifications have X and Y not being the same?

    If so, then is any solution that forces them to be the same possibly correct?

    Similarly, you show that X and Z are ALWAYS opposite of each other.

    Do ANY of the specifications have X and Z being the same?

    If so, then is any solution that forces them to be opposite of each other possibly correct?

    In addition, you have Z being driven by two different gates -- in other words, you have the outputs of two gates tied directly together. How do you expect the signal on that node to behave.
     
  7. RBR1317

    Active Member

    Nov 13, 2010
    227
    47
    Most engineers are not able to jump directly from the problem description to the logic circuit, which is why there is a defined procedure to design a digital function. Step #1 is to translate the problem description into a truth table. Step #2 is to transfer the truth table to a Karnaugh map. Step #3 is minimization to obtain the simplified Boolean expressions. Step #4 is to implement the Boolean expressions in logic gates.

    It appears you need to perform step #1, which may be why the assignment states, "You are required to provide a truth table,..."

    Screenshot from 2016-10-07 20-04-36.png
     
    Last edited: Oct 7, 2016
  8. ci139

    Member

    Jul 11, 2016
    341
    38
    i find it unbelievable that the person with a hart condition should be further exited by a sudden alarm when his/her condition is already critical
     
  9. JoeJester

    AAC Fanatic!

    Apr 26, 2005
    3,373
    1,157
    Assuming the alarm is local ... it's more than likely at the nurses station. The patient sees nothing these days as it's all wifi data going to the nurses station.

    This is a typical logic learning exercise.
     
Loading...