disordered counter

Discussion in 'General Electronics Chat' started by sryzdn, Jun 22, 2014.

  1. sryzdn

    Thread Starter New Member

    Jun 1, 2014
    23
    0
    Hi,

    In the enclosed circuit, I intend to build a circuit that counts up to different numbers in different rounds.

    First, it should count 0 to 7, second 0 to 5, third 0 to 3, then this round should start over again.

    I don't know why I could not make the first round correctly!!! It must count up to 5, but it does not.

    Could you please kindly give me a hint to correct this circuit?
     
  2. MrChips

    Moderator

    Oct 2, 2009
    12,450
    3,370
    You have a number of flaws in your circuit design.

    1) Don't use ripple counters when you need to encode outputs. You will end up with false glitches.

    2) You have Q' being grounded by the RESET push button. This leads to contention.

    3) You have the J and K inputs of U1:A, U1:B, U2:A and all the S inputs floating. This is a no-no.

    4) I cannot figure out the function of U2:B, U6:A and U6:B except as a 3-bit ripple counter.
     
  3. sryzdn

    Thread Starter New Member

    Jun 1, 2014
    23
    0
    How can I change the ripple counter in a way that it counts up to "5"?
     
  4. MrChips

    Moderator

    Oct 2, 2009
    12,450
    3,370
    What is the purpose if U3?

    You have it decoding 2 instead of 5.
     
  5. sryzdn

    Thread Starter New Member

    Jun 1, 2014
    23
    0
    Hi,

    Sorry for my mistake in the last question.

    I have enclosed two diagrams. One of them counts 0 to 7 and then 0 to 3 and this loop goes on. It goes on correctly.

    The other is supposed to count 0 to 7 and then 0 to 5 but it does not go on right. Please help me correct it.

    The final goal is to have a loop that counts 0 to 7 then 0 to 5 then 0 to 3 and then start over again.

    All I have is 7476, that's why I cannot use any else to build this circuit.
    Thanks for your help in advance.
     
  6. sryzdn

    Thread Starter New Member

    Jun 1, 2014
    23
    0
    Sorry, but isn't there anyone interested in this question?
    Is there anything too deviating about this question?
     
  7. MrChips

    Moderator

    Oct 2, 2009
    12,450
    3,370
    Don't zip your attachments.
     
  8. sryzdn

    Thread Starter New Member

    Jun 1, 2014
    23
    0
    Pls find the schema as enclosed.
     
  9. djsfantasi

    AAC Fanatic!

    Apr 11, 2010
    2,815
    834
    The Q' output of U6-B can still be connected directly to ground. This results in a short circuit when the output is high. A diode is required to prevent this from happening.
     
  10. sryzdn

    Thread Starter New Member

    Jun 1, 2014
    23
    0
    Hi,

    As this circuit (countupto3) shows when we reach "3", the nand gate sends a zero to the "counter" clock and starts it. I don't know why I should reset the desired number + 1?

    Besides, why doesn't the second circuit count up to 5 (countupto5)?

    All in all, how does this circuit lead the 7-segment to show the following loop?

    0,1,2,3,4,5,6,7,
    0,1,2,3,4,5,
    0,1,2,3,
    0,1,2,3,4,5,6,7,
    0,1,2,3,4,5,
    0,1,2,3
    ...
     
  11. MrCarlos

    Active Member

    Jan 2, 2010
    400
    134
    Hello sryzdn

    You have some points to improve in your design:

    1)- When working with logic circuits is not wise to leave unconnected input PINs.
    It is the case of the inputs: S, J and K in The Flip-Flip’s.
    Someone had told you already.

    2)- The button you have in your last picture that you enclose.
    I removed it because when pressed can damage the Flip-Flip U6:A. if this was a high level on its ‘Q.

    If you want to see in the Display the numbers 7, 5 and 3. the end of your 3 series, you must reset to zero the SERIES counter on the next number you want to see. In this case would be 8, 6 and 4.

    Let me ask you some questions:
    If you do your design in reality,
    The pulse generator, Which appears in your design, you will not get It in electronics stores?:
    The gates that you have included in your design. Do not have Its ID in their PINs so you can not make the printed circuit board.
    Well this is another matter

    Notice how I separated into parts your design
    1) - SERIES Counter.
    2) - EVENTS Counter.
    3) - Logic Control.

    well,
    A)- In the first attempt the “EVENTS counter” will be at 00.
    The “SERIES counter” should count from 0 to 7,
    So when it get to 8 should be reset its Flip-Flop's to zero.
    And The "EVENTS counter" must be +1.

    B)- On the second attempt the "EVENTS Counter" will be 01.
    Now the "SERIES Counter" should count from 0 to 5.
    So when it get to 6 should be reset its Flip-Flop's to zero.
    And the "EVENTS Counter" must be +1.

    C)- On the third attempt the "EVENTS Counter" will be 10.
    Now the "SERIES Counter" should count from 0 to 3.
    So when it get to 4 should be reset its Flip-Flop's to zero.
    And the "EVENTS Counter" Must also be reset to zero starting the cycle again.

    You got it?

    Therefore you must detect when the "SERIES Counter" reaches 8 OR 6 OR 4.
    any of them, the "EVENTS Counter" should count +1.
    But in 4 it must be reset to zero to start a new cycle.

    The part of your circuit called "Logic Control" shall have at least 3 NAND gates to detect the numbers 8, OR 6, OR 4 which will be enabled (Enabled) for the outputs of the "EVENTS Counter"

    Note that in the "SERIES Counter" you miss a Flip-Flip to reach the 8 count.

    Have a try, you will find it not so hard.

    I am including the file of simulation in Proteus ISIS.
    which is compressed in the ZIP file.
     
    sryzdn and absf like this.
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