Hey Guys,
I have a memory DIP (one of the HM62256B series chips) and the datasheet says that the memory is organized in a 32-kword x 8 bit grid but the chip only has 15 address inputs. How can the datasheet claim that the chip is organized in words when the packet only has 15-bits of address access?
http://www.datasheetarchive.com/Indexer/Datasheet-028/DSA00489713.html
I have a memory DIP (one of the HM62256B series chips) and the datasheet says that the memory is organized in a 32-kword x 8 bit grid but the chip only has 15 address inputs. How can the datasheet claim that the chip is organized in words when the packet only has 15-bits of address access?
http://www.datasheetarchive.com/Indexer/Datasheet-028/DSA00489713.html