I'm currently looking at the digital ramp ADC. I'm going to try a simulation to fully understand how it works, but this approach seems to beat the purpose of not using ICs.

This is the schematic proposed by the tutorial, and at least I would need 3 ICs on top of the decoders -and I guess I would also need a timer-; unless you can replicate the ICs' function with regular components... can you?

Besides, I don't fully understand what's the point of this method: if you're going to use an DAC anyway among other components, why not just simply use a single ADC instead?

 

I'm currently looking at the digital ramp ADC. I'm going to try a simulation to fully understand how it works, but this approach seems to beat the purpose of not using ICs.

This is the schematic proposed by the tutorial, and at least I would need 3 ICs on top of the decoders -and I guess I would also need a timer-; unless you can replicate the ICs' function with regular components... can you?


Besides, I don't fully understand what's the point of this method: if you're going to use an DAC anyway among other components, why not just simply use a single ADC instead?

As a rule, DACs are easier to implement than ADCs.

What is SRG? I'm assuming it's just a register.

 

Thanks. I skimmed through the rest of the methods proposed, and it's more or less the same case as with that one; except for the last one, the delta-sigma ADC.

I also couldn't find what an SRG is; so I couldn't try a simulation.

 

To using this R-2R dac and using the 74HC4040 or 74HC4520 to replace 74HCT573, and to figrue out what I'm thinking.

That's a very basic way and it would help you to know more how about a DAC and ADC.

 

To using this R-2R dac and using the 74HC4040 or 74HC4520 to replace 74HCT573, and to figrue out what I'm thinking.

That's a very basic way and it would help you to know more how about a DAC and ADC.

You lost me... I think I really need to go through the whole digital volume first, as I'm not familiar with what latch, ripple or synchronous counters are. Barely ever worked with digital ICs.

The method I thought was interesting for this project, since it has a minimum of ICs, is this delta-sigma ADC...

 

You lost me... I think I really need to go through the whole digital volume first, as I'm not familiar with what latch, ripple or synchronous counters are. Barely ever worked with digital ICs.

The method I thought was interesting for this project, since it has a minimum of ICs, is this delta-sigma ADC...

The meaning is the same, when you using the way that I told you, it will like as this, when the D F-F is just for one bit, and you using the 74HC4040 or 74HC4520 to replace the D F-F, what will you do for the output?

 

I'll have to answer that question tomorrow; when I finish studying the chapter explaining that circuit.

 

I'm currently looking at the digital ramp ADC. I'm going to try a simulation to fully understand how it works, but this approach seems to beat the purpose of not using ICs.

This is the schematic proposed by the tutorial, and at least I would need 3 ICs on top of the decoders -and I guess I would also need a timer-; unless you can replicate the ICs' function with regular components... can you?


Besides, I don't fully understand what's the point of this method: if you're going to use an DAC anyway among other components, why not just simply use a single ADC instead?

A time-to-digital converter uses basically the same idea except that there is no ADC. Instead you have a sawtooth ramp generator that ramps up linearly with time. You have a counter that is reset when the ramp reaches the lower reference voltage and the counter value is captured into a register when the ramp voltage passes the signal being measured. The ramp rate has to be closely matched to the count rate, but there are some simple ways to servo one to the other.