Digital TTL logic h.w. question

Discussion in 'Homework Help' started by jut, Feb 7, 2009.

  1. jut

    Thread Starter Senior Member

    Aug 25, 2007
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    When trouble shooting a TTL logic circuit, what is the likely problem if a steady-sate input voltage is invalid?

    I'm not sure what they mean by steady-state. Does it just mean constant DC voltage?

    I also know that TTL voltage levels are:
    0 - 0.8 = low
    2 - 5.0 = high

    So if the "steady-state" input voltage is not within the TTL range, then it would be invalid. But this answer seems too obvious. Any tips appreciated.
     
  2. leftyretro

    Active Member

    Nov 25, 2008
    394
    2
    Most digital logic families have a 'invalid' input voltage range where there is no guarantee if the device will generate a high or low output or just oscillate between high and low. The actual value of the invalid area can change some with temperature, so the exact value is not so important as understanding that there is a forbidden voltage gap.

    Yes, steady state means a constant DC voltage. So if a legal LOW is anywhere from say 0vdc to .8vdc and a legal HIGH is anywhere between 2.5 to 5vdc that leaves a invalid 'no mans land' if the steady state was in the .8 to 2.5vdc range. This is electrically possible so one needs to know how the device will respond and how best to deal with it. The most common method is to wire the input to a high value resistor wired to 0vdc or +5vdc, this is called a pull-down or pull-up resistor. The input signal can still override this pulled signal.

    That make sense?
     
  3. bertus

    Administrator

    Apr 5, 2008
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  4. jut

    Thread Starter Senior Member

    Aug 25, 2007
    224
    2
    Thanks for the explanation. I get the invalid range thing; if the input voltage lies in no mans lands, then there's no telling what the output will be.

    And so by tieing the input to Vcc or gnd you ensure it's not floating to some unknown level, right?

    In our first lab, it was explained to us that an open input would be interpreted by the gate as a high, which we verified as true. BTW, we were using a DM7404N -- 6 inverters.
     
  5. jut

    Thread Starter Senior Member

    Aug 25, 2007
    224
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    Thanks for the chart.

    I'm using a fairchild DM7404N. I think this was just the "TTL" family, not the CMOS/TTL, since I was measuring an output voltage high of 3.6V.
     
  6. mik3

    Senior Member

    Feb 4, 2008
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    Yes it is TTL family. Also, you can identify it from 74XX part number.
     
  7. leftyretro

    Active Member

    Nov 25, 2008
    394
    2
    Correct, by using a pulling resistor you insure that there will be a valid digital signal level to the chip at all times, nothing floating around the forbidden area.

    Some logic families (like TTL) have an internal pull up forcing the input pin high, however it is usually a very high ohm value and the 'floating' input is very subjective to noise input.

    It's required in some CMOS logic families that you wire unused input pins to ground or Vcc either directly or with resistors or the device will burn up because the gate will go into high speed oscillation and draw too much current, and burn your finger also ;)

    Lefty
     
  8. jut

    Thread Starter Senior Member

    Aug 25, 2007
    224
    2
    Wow. That's crazy.
     
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