Digital Logic Question (exam is tomorrow!)

Discussion in 'Homework Help' started by jetpac, Apr 29, 2010.

  1. jetpac

    Thread Starter New Member

    Feb 5, 2010
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    1
    This is a question someone else posted this time last year which was never really fully answered (too old to bump).

    I have the same exam tomorrow and am experiencing the same problems so if anyone can provide some help on questions 2 or 3 it'd be greatly appreciated!

    (http://forum.allaboutcircuits.com/showthread.php?p=144945#post144945):

     
    kota likes this.
  2. bertus

    Administrator

    Apr 5, 2008
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    Hello,

    I moved to post to the homework help section.

    Can you show us what you have reached upto now?
    This way we can show you how to continue.

    Bertus
     
  3. jetpac

    Thread Starter New Member

    Feb 5, 2010
    7
    1
    Well, the main question I have is the second one from the post. As the OP mentioned, expanding the draft transition table to a full one and converting to a flow table is not really a problem, its just that our book and our lectures don't cover anything along the lines of deriving a draft transition table from an algorithm like that. So really I think just a nudge in the right starting direction and the rest is not too tricky - I just don't know where to start..

    I'm presuming x is an external input and y is a primary excitation variable. Q, I presume is the input to a latch (?) - the only thing our book mentions about using latches in asynchronous logic is an example where Q is an output from a latch and seems to be the same as Y, but in the question here Q gets set to Y' in one case and Qlast' in another - so Y presumably is not equal to Q! Is it just me or is the question not too clear? probably just me!

    Err so thats where my thinking is, not very clear really - hope this question doesn't come up tomorrow!!
     
  4. bertus

    Administrator

    Apr 5, 2008
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    Hello,

    Take a look at the PDF in the link:
    http://www.ugrad.cs.ubc.ca/~cs218/slides/218-5.pdf

    This is a link of the EDUCYPEDIA on flop flop technology:
    http://www.educypedia.be/electronics/digitalflipflops.htm

    There are more pages like that on other digital subjects:

    Digital electronics:
    Arithmetic circuits D/A-A/D converters Number systems Codes and decoders Flip flops Technology Counters and registers General overview Technology-CMOS Digital logic Memories Technology-TTL Timers and oscillators

    Greetings,
    Bertus
     
  5. jetpac

    Thread Starter New Member

    Feb 5, 2010
    7
    1
    Thanks for the links Bertus, a good rundown of flip flops. But I'm actually pretty okay with how flip flops work - I'm just not clear on how Q, Qlast and Y relate in the given algorithm and how they would fit into a transition table that has primary excitation variables along the vertical and external inputs along the horizontal - which is all our book goes into as far as transition tables are concerned..

    Note - this is an Asynchronous machine so any storage element would be a latch rather than a clocked flip flop..
     
  6. bertus

    Administrator

    Apr 5, 2008
    15,646
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